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參數(shù)資料
| 型號： | 935260443112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 7.50 MM, PLASTIC, MO-118AA, SOT-370-1, SSOP3-48 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 519K |
| 代理商： | 935260443112 |
Philips Semiconductors: Product information on 74ALVCH16373, 2.5 V / 3.3 V 16-bit D-type transparent latch (3-State)
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12/28/00
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Information as of 2000-11-03
74ALVCH16373; 2.5 V / 3.3 V 16-bit D-type transparent latch (3-State)
Description
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Description
The 74ALVCH16373 is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs
for bus oriented applications. Incorporates bus hold data inputs which eliminate the need for external pull-up or pull-down
resistors to hold unused inputs. One latch enable (LE) input and one output enable (OE) are provided per 8-bit section.
The 74ALVCH16373 consists of 2 sections of eight D-type transparent latches with 3-State true outputs. When LE is HIGH,
data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e., a latch output will change each time
its corresponding D-input changes.
When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-
LOW transition of LE. When OE is LOW, the contents of the eight latches are available at the outputs. When OE is HIGH,
the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latches.
Features
l
Wide supply voltage range of 1.2V to 3.6V
l
Complies with JEDEC standard no. 8-1A
l
CMOS low power consumption
l
MULTIBYTETM flow-through standard pin-out architecture
l
Low inductance multiple V
CC and ground pins for minimum noise and ground bounce
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