參數(shù)資料
型號(hào)： 935260577557
廠商： NXP SEMICONDUCTORS
元件分類： 無繩電話/電話
英文描述： TELECOM, CORDLESS, BASEBAND CIRCUIT, PQFP100
封裝： PLASTIC, SOT-407, LQFP-100
文件頁數(shù)： 2/59頁
文件大小： 781K
代理商： 935260577557
1999 Jun 04
10
Philips Semiconductors
Product specication
Global Positioning System (GPS)
baseband processor
SAA1575HL
RFLE
91
O
RFIC setup latch: output used to latch the RFIC set-up into the active UAA1570HL
control registers
IF2
92
I
MSB IF input: MSB of the 2-bit GPS digital IF signal input. Clocked in on the rising
edge of SCLK. If only a 1-bit IF input is available this input should be held HIGH.
IF1
93
I
LSB IF input: LSB of the 2-bit GPS digital IF signal input. Clocked in on the rising
edge of SCLK.
GPIO2
94
I/O
GPIO bit 2: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
GPIO1
95
I/O
GPIO bit 1: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
GPIO0
96
I/O
GPIO bit 0: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
n.c.
97
O
Not connected: do not connect
RCLK
98
I
Reference clock: input from the TXCO reference. Not used internally. This is divided
under rmware control to produce the sample clock, SCLK, used to gate the IF inputs.
TEST1
99
I
Test pin: connect to pin 100
TEST2
100
O
Test pin: connect to pin 99
SYMBOL
PIN
I/O
DESCRIPTION
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