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參數(shù)資料
| 型號(hào)： | 935260938551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, SOT-205, QFP-44 |
| 文件頁(yè)數(shù)： | 23/26頁(yè) |
| 文件大小： | 197K |
| 代理商： | 935260938551 |
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1998 Feb 05
6
Philips Semiconductors
Objective specication
Multimedia video data acquisition circuit
SAA5284
Note
1. These pins have two functions, depending on the interface mode.
OSCGND
9
oscillator ground
SEL0
10
I
parallel interface format select 0
SEL1
11
I
parallel interface format select 1
BLACK
12
I/O
video black level storage; connected to VSSA via 100 nF capacitor
IREF
13
I
reference current input; connected to VSSA via 27 k resistor
CVBS1
14
I
analog composite video input 1
CVBS0
15
I
analog composite video input 0
VDDA
16
analog +5 V supply
VSSA
17
analog ground supply
VSSD1
18
I
digital ground supply 1
VSSD2
19
I
digital ground supply 2
D7(1)
20
I/O
data bus 7/video data output 7
D6(1)
21
I/O
data bus 6/video data output 6
D5(1)
22
I/O
data bus 5/video data output 5
D4(1)
23
I/O
data bus 4/video data output 4
D3(1)
24
I/O
data bus 3/video data output 3
D2(1)
25
I/O
data bus 2/video data output 2
D1(1)
26
I/O
data bus 1/video data output 1
D0(1)
27
I/O
data bus 0/video data output 0
A0(1)
28
I
address input 0/video data input 7
A1(1)
29
I
address input 1/video data input 6
A2(1)
30
I
address input 2/video data input 5
INT
31
O
interrupt request
RDY(1)
32
O
ready/DTACK (data acknowledge)/VBI, open-drain
WR(1)
33
I
Intel bus Write/Motorola bus R/W/video data input 4
RD(1)
34
I
Intel bus Read/Motorola bus LDS/video data input 3
CS0
35
I
chip select 0; active LOW
DMARQ
36
O
DMA request
DMACK(1)
37
I
DMA acknowledge/video data input 2
VPOIN0
38
I
video data input 0
VPOIN1
39
I
video data input 1
VSSD3
40
digital ground supply 3
VDDD
41
digital +5 V supply
LLC
42
I
full rate digital video clock input
LLC2
43
I
half rate digital video clock input
CS1
44
I
chip select 1; active LOW
SYMBOL
PIN
I/O
DESCRIPTION
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