參數(shù)資料
型號： 935261222557
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： PLASTIC, SOT-319, QFP-64
文件頁數(shù)： 27/36頁
文件大?。?/td> 203K
代理商： 935261222557
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TDA8960
Information as of 2000-08-20
TDA8960; ATSC 8-VSB demodulator and decoder
The TDA8960 is an ATSC-compliant demodulator and forward error correction decoder for reception of 8-VSB modulated signals for
terrestrial and cable applications:
l
Terrestrial: reception of 8-VSB modulated signals via standard 6 MHz VHF/UHF terrestrial TV channels (TV channels 2 to 69 in the
United States)
l
Cable: reception of 8-VSB modulated signals via standard 6 MHz VHF/UHF cable TV channels.
Most of the loop components needed to recover the data from the received symbols are internal. The only required external loop
components are a low-speed serial D/A converter and a Voltage Controlled crystal Oscillator (VCXO) for the symbol timing recovery and an
opamp integrator for the AGC. Loop parameters of the clock and carrier recovery can be controlled by the IC-bus.
A tuner converts the incoming RF frequency to a fixed IF frequency centred at 44 MHz. The output of the tuner is filtered, followed by a
down conversion in an IF block to a low IF frequency centred at 1/2 the VSB symbol rate (or a frequency of approximately 5.38 MHz). The
low IF signal is applied to the A/D converter.
To use its full input span, the A/D converter is located within what is typically a fine AGC loop which includes a variable gain stage at the
output of the IF block. However, it is also possible to apply the TDA8960 AGC control output directly to the tuner. The detector for the
TDA8960 AGC output is located after the A/D converter and determines the peak level of the incoming signals. After gain control, the low
IF signal is sampled at a nominal rate of twice the VSB symbol frequency, or approximately 21.5 MHz.
The carrier recovery is performed completely internally. This function consists of a digital frequency and Frequency Phase-Locked Loop
(FPLL).
Data shaping is performed with a square root raised cosine (half Nyquist) filter with roll-off factor of 11.5%.
Symbol timing recovery is performed mostly within the TDA8960, except that a low cost D/A converter and VCXO are required externally to
generate the nominal 21.52 MHz clock signal for the A/D converter and TDA8960.
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