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參數(shù)資料
| 型號(hào)： | 935261327551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | DUAL 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP64 |
| 封裝： | PLASTIC, SOT-314-2, LQFP-64 |
| 文件頁數(shù)： | 3/26頁 |
| 文件大?。?/td> | 262K |
| 代理商： | 935261327551 |
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1999 Sep 16
11
Philips Semiconductors
Objective specication
Dual 8-bit, 100 Msps A/D converter with
DPGA
TDA8798
BANDWIDTH AND SETTLING
B(3dB)(DPGA)
DPGA
3 dB bandwidth
at Vi(dif)(max)
30
tbf
MHz
tst
settling time
full-scale transition
10% to 90%
40
ns
td(g)
group delay
fi up to 15 MHz
at G(min)
tbf
ps
at G(max)
tbf
ps
GAIN
G(min)
minimum gain setting
tbf
0
tbf
dBV
G(max)
maximum gain setting
tbf
34
tbf
dBV
Gstep
gain step size
0.54
dBV
Gstep(L)
gain step size linearity (actual
gain step/average
1)
0.75
+0.75 dBV
G(m)(c-c)
channel-to-channel gain
matching
at G(min)
tbf
dB
at G(max)
tbf
dB
G/T
amplier gain stability as a
function of temperature
at G(min)
8
tbf
mdB/
°C
at G(max)
8
tbf
mdB/
°C
G/V
DD
amplier gain stability as a
function of power supply
voltage
at G(min)
0.4
tbf
dB/V
at G(max)
0.8
tbf
dB/V
GAIN SWITCHING;T
AMB =25 °C
tst(G-G)
settling time between two
consecutive gain settings
CL =68pF
160
ns
tPD
propagation delay
20
ns
REJECTION
PSRR
power supply rejection ratio
DC to 15 MHz
at G(min)
40
dB
CMRR
common mode rejection ratio
40
dB
HARMONICS;T
AMB =25 °C
HD2
second harmonic distortion
fi = 15 MHz;
at Vo(dif)(max); at gain
control register:
00H
40
tbf
dB
20H
40
tbf
dB
3FH
tbf
dB
HD3
third harmonic distortion
fi = 15 MHz;
at Vo(dif)(max); at gain
control register:
00H
tbf
50
dB
20H
tbf
50
dB
3FH
50
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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