- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄36338 > 935262202112 (NXP SEMICONDUCTORS) VERTICAL DEFLECTION IC, PSIP9 PDF資料下載
參數(shù)資料
| 型號： | 935262202112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | VERTICAL DEFLECTION IC, PSIP9 |
| 封裝： | POWER, PLASTIC, SOT-131-2, SIP-9 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大小： | 106K |
| 代理商： | 935262202112 |
1999 Sep 27
6
Philips Semiconductors
Product specication
DC-coupled vertical deection circuit
TDA8356
CHARACTERISTICS
VP = 14.5 V; Tamb =25 °C; VFB = 45 V; fi = 50 Hz; II(sb) = 400 A; measured in test circuit of Fig.3; unless otherwise
specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
DC supply
VP
operating supply voltage
9.0
14.5
25
V
VFB
yback supply voltage
VP
50
V
IP
supply current
no signal; no load
30
55
mA
Vertical circuit
VO
output voltage swing (scan)
Idiff = 0.6 mA (p-p);
Vdiff = 1.8 V (p-p);
IO = 2 A (p-p)
13.2
V
LE
linearity error
IO = 2 A (p-p); note 1
14
%
IO = 50 mA (p-p); note 1
14
%
VO
output voltage swing (yback); VO(A) VO(B)
Idiff = 0.3 mA;
IO =1A
40
V
VDF
forward voltage of the internal efciency diode
(VO(A) VFB)
IO = 1A;
Idiff = 0.3 mA
1.5
V
I
os
output offset current
Idiff =0;
II(sb) =50to500 A
40
mA
V
os
offset voltage at the input of the feedback
amplier (VI(fb) VO(B))
Idiff =0;
II(sb) =50to500 A
24
mV
V
osT
output offset voltage as a function of
temperature
Idiff =0
72
V/K
VO(A)
DC output voltage
Idiff = 0; note 2
6.5
V
Gvo
open-loop voltage gain
notes 3 and 4
80
dB
open loop voltage gain
note 3
80
dB
VR
voltage ratio
0
dB
fres
frequency response (
3 dB)
open loop; note 5
40
Hz
GI
current gain (IO/Idiff)
5000
G
cT
current gain drift as a function of temperature
4
K
II(sb)
signal bias current
50
400
500
A
IFB
yback supply current
during scan
100
A
PSRR
power supply ripple rejection
note 6
80
dB
VI(DC)
DC input voltage
2.7
V
VI(CM)
common mode input voltage
II(sb) =0
0
1.6
V
Ibias
input bias current
II(sb) =0
0.1
0.5
A
IO(CM)
common mode output current
II(sb) = 300 A (p-p);
fi = 50 Hz; Idiff =0
0.2
mA
V
7-4
V
1-2
----------
V
7-4
V
9-4
---------- ; V12
–
0
=
V
1-2
V
9-4
----------
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 935262254551 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 935262255557 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 935266896551 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 935266896557 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 935262255551 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935262217118 | 制造商:NXP Semiconductors 功能描述:Real Time Clock Serial 8-Pin SO T/R |
| 935264217557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC |
| 935267356112 | 制造商:NXP Semiconductors 功能描述:IC TEA1507PN |
| 935268081112 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC |
| 935268721125 | 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。