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參數(shù)資料
| 型號： | 935262611557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 33/35頁 |
| 文件大小： | 250K |
| 代理商： | 935262611557 |
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Philips Semiconductors
Product specification
89C51/89C52/89C54/89C58
80C51 8-bit microcontroller family
4K/8K/16K/32K Flash
1999 Oct 27
7
FLASH EPROM MEMORY
General Description
The 89C51/89C52/89C54/89C58 FLASH reliably stores memory
contents even after 100 erase and program cycles. The cell is
designed to optimize the erase and programming mechanisms. In
addition, the combination of advanced tunnel oxide processing and
low internal electric fields for erase and programming operations
produces reliable cycling.
Features
FLASH EPROM internal program memory with Chip Erase
Up to 64 k byte external program memory if the internal program
memory is disabled (EA = 0)
Programmable security bits
100 minimum erase/program cycles for each byte
10 year minimum data retention
Programming support available from many popular vendors
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an
inverting amplifier. The pins can be configured for use as an
on-chip oscillator.
To drive the device from an external clock source, XTAL1 should be
driven while XTAL2 is left unconnected. There are no requirements
on the duty cycle of the external clock signal, because the input to
the internal clock circuitry is through a divide-by-two flip-flop.
However, minimum and maximum high and low times specified in
the data sheet must be observed.
RESET
A reset is accomplished by holding the RST pin high for at least two
machine cycles (24 oscillator periods), while the oscillator is running.
To insure a good power-on reset, the RST pin must be high long
enough to allow the oscillator time to start up (normally a few
milliseconds) plus two machine cycles. At power-on, the voltage on
VCC and RST must come up at the same time for a proper start-up.
Ports 1, 2, and 3 will asynchronously be driven to their reset
condition when a voltage above VIH1 (min.) is applied to RESET.
The value on the EA pin is latched when RST is deasserted and has
no further effect.
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