
different output modes to interface to a demultiplexer/descrambler/MPEG-2 decoder including a 3-state mode. For evaluation of the
TDA8044, demodulator and Viterbi outputs can be made available externally.
Interfacing to the TDA8044 has been extended compared to the TDA8043. Separate resets are available for logic only, logic plus IC-bus
and carrier loops. A Power-on reset module has been implemented which gives a reset signal at power-up. This signal can be used to reset
the TDA8044 in order to guarantee correct starting of the IC. Two extra general purpose I/O pins (I/O expanders) have been added. A
switchable IC-bus loop-through to the tuner is implemented to switch-off the IC-bus connection to the tuner. This reduces phase noise in
the tuner in the event of IC-bus crosstalk. The transport stream outputs can be put in 3-state mode. DiSEqC level 1.X support is integrated
for dish control applications. The power consumption in standby mode has been decreased considerably.
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General features:
- One-chip Digital Video Broadcasting (DVB) compliant Quadrature Phase Shift Keying (QPSK) and Binary Phase Shift Keying
(BPSK) demodulator and concatenated Viterbi/Reed-Solomon decoder with de-interleaver and de-randomizer (ETS 300 421)
- 3.3 V supply voltage (input pads are 5 V tolerant)
- Standby mode for low power dissipation
- Internal clock PLL to allow low frequency crystal application and selectable clock frequencies
- Power-on reset module
- Package: QFP100
- Boundary scan test.
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QPSK/BPSK demodulator:
- Interpolator and anti-alias filter to handle a large range of symbol rates without additional external filtering
- On-chip AGC of the analog input I and Q baseband signals or tuner AGC control
- Two on-chip matched Analog-to-Digital Converters (ADCs; 7 bits)
- Half Nyquist (square root raised-cosine) filter with selectable roll-off factor
- Large range of symbol frequencies:
0.5 to 45 Msymbols/s for TDA8044 and
0.5 to 30 Msymbols/s for TDA8044A, including
Single Carrier Per Channel (SCPC) function
- Can be used at low channel Signal-to-Noise ratio (S/N)
- Internal carrier recovery, clock recovery and AGC loops with programmable loop filters
- Two loop carrier recovery enabling phase tracking of the incoming symbols
- Software carrier sweep for low symbol rate applications
- Signal-to-noise ratio estimation
- External indication of demodulator lock.
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Viterbi decoder:
- Rate 1/2 convolutional code based
- Constraint length K = 7 with G
1 = 171oct and G2 = 133oct; supported puncturing code rates: 1/2 , 2/3 , 3/4 , 4/5 , 5/6 , 6/7 , 7/8 and
8/9
- 4 bits input for ‘soft decision’ for both I and Q
- Truncation length: 144
- Automatic synchronization
- Channel Bit Error Rate (BER) estimation
- External indication of Viterbi sync lock
- Differential decoding optional.
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Reed-Solomon (RS) decoder:
- (204, 188, T = 8) Reed-Solomon code
Features