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參數(shù)資料
| 型號： | 935263262557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 50/76頁 |
| 文件大?。?/td> | 567K |
| 代理商： | 935263262557 |
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Philips Semiconductors
Product specification
P83C557E4/P80C557E4/P89C557E4
Single-chip 8-bit microcontroller
1999 Mar 02
54
Figure 49. FEEPROM control register.
7
6
54
321
0
FMCON (FB)
UBS1
UBS0
HV
– 1)
FCB3
FCB2
FCB1
FCB0
NOTE:
1. Reserved for future use; a write operation must write “0” to the location.
Table 45.
Description of FMCON bits
UBS1
UBS0
User - Boot selection bits
0
User memory mapped from 0 to 64 K.
0
1
User memory mapped from 0 to 63 K.
Boot ROM mapped from 63 K to 64 K.
1
0
User memory mapped from 0 to 63 K, but UBS1 bit cleared by hardware in this user address range.
Boot ROM mapped from 63 K to 64 K. User software should not write “1” UBS1.
1
Boot ROM mapped from 0 to 64 K. User software should not write “1” UBS1.
HV
High voltage indication bit. Read only. Is “1” as long as the high voltage for an erase or write operation
is present.
FCB3
FCB2
FCB1
FCB0
Function Code Bits
0
Value after Reset.
0
1
0
1
Byte Write or byte read (verify)
1
0
Page Erase (32 bytes boundaries).
0
1
Block Erase (256 bytes boundaries).
1
0
1
0
Full Erase (32 Kbytes).
The four FCB bits are write protected if the security feature is
activated. Then only instructions in the internal program memory
(FEEPROM) are able to write FCB (3–0), boot ROM and external
program memory instructions cannot change FCB (3–0) except the
full erase code can be loaded.
The duration of a write or erase operation is determined by the
FEEPROM timer. This timer includes a zero point RC oscillator and
cannot be controlled by software.
For calling a user routine in the boot ROM first all interrupts must be
disabled and the DPTR and A have to be loaded with the desired
values. After setting UBS0 = 1 and UBS1 = 0 and selecting the
function via FCB-bits the respective user routine has to be called.
The table below lists the boot ROM user routines, which can be
called by the user program. The content of FMCON, A and DPTR
before the call is described by “(IN)” and the contents after the
return is described by “(OUT)”. The boot ROM user routines do not
change other registers or Data memory.
BOOT-ROM
ROUTINE
CALL
ADDRESS
FMCON
(IN)
FMCON
(OUT)
ACC
(IN)
ACC
(OUT)
DPTR
(IN)
DPTR
(OUT)
BYTE_READ
FFBAH
45H
15H
XXH
BYTE
BYTE ADDRESS
BYTE_WRITE
FFADH
45H
15H
BYTE
BYTE (V)
BYTE ADDRESS
PAGE_ERASE
FFAAH
4CH
1CH
XXH
08H
PAGE ADDRESS 1)
PAGE ADDRESS 2)
BLOCK_ERASE
FFA5H
43H
13H
XXH
02H
BLOCK ADDRESS 3)
BLOCK ADDRESS 4)
FULL_ERASE
FFA0H
4AH
1AH
XXH
0AH
XXXXH
0018H
X
= don’t care or not defined
V
= verified byte (read back)
1) = 5 LSB’s of DPTR are don’t care
2) = 5 LSB’s of DPTR are “0”
3) = 8 LSB’s of DPTR are don’t care
4) = 8 LSB’s of DPTR contain 08H.
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