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參數(shù)資料
| 型號： | 935263935118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | 2-BAND, VIDEO TUNER, PDSO28 |
| 封裝： | PLASTIC, SOT-341, SSOP-28 |
| 文件頁數(shù)： | 2/48頁 |
| 文件大小： | 242K |
| 代理商： | 935263935118 |
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2000 Aug 02
10
Philips Semiconductors
Product specication
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6502; TDA6502A;
TDA6503; TDA6503A
Table 5
Description of the bits used in Tables 3 and 4
Table 6
Address selection bits (I2C-bus mode)
Table 7
Test mode bits
Notes
1. This is the default mode at Power-on reset.
2. The ADC input cannot be used when these test modes are active; see Section 8.2.3 for more information.
BIT
DESCRIPTION
MA1 and MA0
programmable address bits (see Table 6)
R/W
logic 0 for write mode
N14 to N0
programmable divider bits: N = N14
× 214 + N13 × 213 + ... + N1 × 21 +N0
CP
charge pump current control bit:
logic 0: charge pump current is 60
A
logic 1: charge pump current is 280
A (at power-on)
T2, T1 and T0
test bits (see Table 7)
RSA and RSB
reference divider ratio select bits (see Table 8)
OS
tuning amplier control bit:
logic 0: tuning voltage is ‘on’ (during normal operating)
logic 1: tuning voltage is ‘off’; high-impedance output of pin VT (at power-on)
PVHFL, PVHFH, PUHF and FMST
PMOS ports control bits:
logic 0: corresponding buffer is ‘off’ (at power-on)
logic 1: corresponding buffer is ‘on’
X
don’t care
MA1
MA0
VOLTAGE APPLIED TO PIN CE/AS
0
0 V to 0.1VCC
0
1
0.2VCC to 0.3VCC or open-circuit
1
0
0.4VCC to 0.6VCC
1
0.9VCC to 1.0VCC
T2
T1
T0
TEST MODE
0
normal mode
0
1
normal mode (note 1)
0
1
X
charge pump is off
1
0
charge pump is sinking current
1
charge pump is sourcing current
100
fREF is available on pin LOCK/ADC (note 2)
101
1
2fDIV is available on pin LOCK/ADC (note 2)
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