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參數(shù)資料
| 型號： | 935265464112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)移位寄存器 |
| 英文描述： | AHCT/VHCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14 |
| 文件頁數(shù)： | 20/20頁 |
| 文件大?。?/td> | 92K |
| 代理商： | 935265464112 |
2000 Aug 15
9
Philips Semiconductors
Product specication
8-bit serial-in/parallel-out shift register
74AHC164; 74AHCT164
AC CHARACTERISTICS
Type 74AHC164
GND = 0 V; tr =tf ≤ 3.0 ns.
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb (°C)
UNIT
WAVEFORMS
CL
25
40 to +85 40 to +125
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VCC = 3.0 to 3.6 V; typical values at VCC = 3.3 V
tPHL/tPLH
propagation delay
CP to Qn
see Figs 6 and 9 15 pF
6.5
12.8
1.0
15.0
1.0
16.0
ns
tPHL
propagation delay
MR to Qn
see Figs 7 and 9
5.3
12.8
1.0
15.0
1.0
16.0
ns
fmax
maximum clock pulse
frequency
see Figs 6 and 9
80
125
65
50
MHz
tPHL/tPLH
propagation delay
CP to Qn
see Figs 6 and 9 50 pF
9.3
16.3
1.0
18.5
1.0
20.5
ns
tPHL
propagation delay
MR to Qn
see Figs 7 and 9
7.6
16.3
1.0
18.5
1.0
20.5
ns
tW
clock pulse width HIGH
or LOW
see Figs 6 and 9
5.0
5.0
5.0
ns
master reset pulse
width LOW
see Figs 7 and 9
5.0
5.0
5.0
ns
tsu
set-up time
Dsa,Dsb to CP
see Figs 8 and 9
5.0
6.0
6.0
ns
th
hold time
Dsa, Dsb to CP
see Figs 8 and 9
1.5
1.5
1.5
ns
trem
removal time MR to CP see Figs 7 and 9
2.5
2.5
2.5
ns
fmax
maximum clock pulse
frequency
see Figs 6 and 9
50
75
45
35
MHz
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| 935265463118 | AHCT/VHCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14 |
| 935265464118 | AHCT/VHCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14 |
| 935265466118 | AHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14 |
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