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參數(shù)資料
| 型號： | 935265479112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 71K |
| 代理商： | 935265479112 |
2000 Mar 07
5
Philips Semiconductors
Product specication
Hex inverter with open-drain outputs
74LVC06A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
MIN.
MAX.
VCC
DC supply voltage
1.65
5.5
V
VI
DC input voltage
0
5.5
V
VO
DC output voltage
active mode
0
VCC
V
high-impedance mode
0
5.5
V
Tamb
operating ambient temperature
40
+85
°C
tr,tf
input rise and fall ratios
VCC = 1.65 to 2.7 V
0
20
ns/V
VCC = 2.7 to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
DC supply voltage
0.5
+6.5
V
IIK
DC input diode current
VI <0
50
mA
VI
DC input voltage
note 1
0.5
+6.5
V
IOK
DC output clamping diode current
VO <0
50
mA
VO
DC output voltage
active mode; note 1
0.5
VCC + 0.5 V
high-impedance mode;
note 1
0.5
+6.5
V
IO
DC output sink current
VO = 0 to VCC
50
mA
ICC, IGND
DC VCC or GND current
±100
mA
Tstg
storage temperature
65
+150
°C
Ptot
power dissipation per package
SO package
above 70
°C derate linearly
with 8 mW/K
500
mW
TSSOP package
above 60
°C derate linearly
with 5.5 mW/K
500
mW
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