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參數(shù)資料
| 型號(hào)： | 935265484118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | AVC SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-362, TSSOP-48 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 84K |
| 代理商： | 935265484118 |
2000 Mar 09
2
Philips Semiconductors
Product Specication
16-bit edge triggered D-type ip-op; 3.6 V tolerant;
3-state
74AVC16374
FEATURES
Wide supply voltage range from 1.2 to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7
CMOS low power consumption
Input/output tolerant up to 3.6 V
DCO (Dynamic Controlled Output) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
Low inductance multiple VCC and GND pins to minimize
noise and ground bounce
Supports Live Insertion.
DESCRIPTION
The 74AVC16374 is a 16-bit edge triggered flip-flop
featuring separate D-type inputs for each flip-flop and
3-state outputs for bus oriented applications.
The 74AVC16374 consist of 2 sections of eight edge
triggered flip-flops. A clock input (CP) and an output
enable (OE) are provided per 8-bit section.
The 74AVC16374 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, nOE should be tied to VCC
through a pull-up resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
Fig.1
Output voltage as a function of the
HIGH-level output current.
handbook, halfpage
012
4
0
200
300
100
MNA506
3
VOH (V)
IOH
(mA)
1.8 V
2.5 V
3.3 V
handbook, halfpage
012
4
300
100
0
200
MNA507
3
VOL (V)
IOL
(mA)
1.8 V
2.5 V
3.3 V
Fig.2
Output voltage as a function of the
LOW-level output current.
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