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參數(shù)資料
| 型號(hào)： | 935265560112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | AHCT/VHCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16 |
| 文件頁(yè)數(shù)： | 5/20頁(yè) |
| 文件大?。?/td> | 103K |
| 代理商： | 935265560112 |
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2000 Mar 15
13
Philips Semiconductors
Product specication
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state
74AHC595; 74AHCT595
AC WAVEFORMS
handbook, full pagewidth
MNA557
SHCP input
Q7' output
tPLH
tPHL
tW
1/fmax
VM
(2)
VOH
VI
GND
VOL
VM
(1)
FAMILY
VI INPUT
REQUIREMENTS
VM(1)
INPUT
VM(2)
OUTPUT
AHC
GND to VCC
50% VCC 50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
Fig.7
The clock (SHCP) to output (Q7’) propagation delays, the shift clock pulse width (tW) and maximum shift
clock frequency (fmax).
handbook, full pagewidth
MNA558
STCP input
Qn output
tPLH
tPHL
tW
tsu
1/fmax
VM
(2)
VOH
VI
GND
VOL
VM
(1)
SHCP input
VI
GND
VM
(1)
Fig.8
The storage clock (STCP) to output (Qn) propagation delays, the storage clock pulse width (tW) and the
shift clock to storage clock set-up time (tsu).
FAMILY
VI INPUT
REQUIREMENTS
VM(1)
INPUT
VM(2)
OUTPUT
AHC
GND to VCC
50% VCC 50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
相關(guān)PDF資料 |
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| 935265567118 | AHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 935265568112 | AHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 935265568118 | AHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 935265567112 | AHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 935265560118 | AHCT/VHCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
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