參數(shù)資料
型號： 935267931118
廠商： NXP SEMICONDUCTORS
元件分類： 總線收發(fā)器
英文描述： AVC SERIES, 18 1-BIT DRIVER, TRUE OUTPUT, PDSO56
封裝： 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP-56
文件頁數(shù)： 11/13頁
文件大?。?/td> 116K
代理商： 935267931118
Philips Semiconductors
Product data
74AVC16834A
18-bit registered driver with inverted register enable
and Dynamic Controlled Outputs
(3-State)
2002 Sep 11
7
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = 3.3 ± 0.3 V
VCC = 2.5 ± 0.2 V
VCC = 1.8 ± 0.15 V
VCC =
1.5
± 0.1 V
VCC =
1.5 V
VCC =
1.2 V
UNIT
MIN
TYP1
MAX
MIN
TYP1
MAX
MIN
TYP1
MAX
MIN
MAX
TYP
Propagation
delay
An to Yn
1, 7
0.9
0.7
1.7
2.6
2.5
1.0
0.8
2.0
3.2
3.0
1.5
1.0
2.8
2.6
4.9
4.5
2.0
5.8
3.6
5.9
5.2
tPHL/tPLH
Propagation
delay
LE to Yn
2, 7
1.2
0.7
2.0
1.9
3.0
2.9
1.5
0.8
2.4
2.3
3.7
3.5
1.8
1.0
3.4
2.9
5.3
2.3
6.5
4.0
6.5
5.8
ns
Propagation
delay
CP to Yn
3, 7
0.8
0.7
1.7
2.5
1.1
0.8
2.0
3.0
1.6
1.0
2.8
2.6
4.4
4.5
2.0
5.1
3.7
4.9
5.2
tPZH/tPZL
3-State output
enable time
OE to Yn
6, 7
1.3
1.0
2.5
2.3
4.3
4.0
1.6
1.0
2.8
2.5
4.8
4.5
2.2
1.5
4.0
3.0
6.7
6.5
2.8
8.2
5.0
8.0
5.5
ns
tPHZ/tPLZ
3-State output
disable time
OE to Yn
6, 7
1.5
1.0
3.0
2.3
4.7
3.5
1.5
1.0
3.4
2.2
5.6
4.0
2.4
1.5
4.6
3.5
7.2
6.5
2.1
6.9
4.5
6.5
5.5
ns
t
CP pulse width
HIGH or LOW
3, 7
1.0
–
1.2
–
2.0
–
ns
tW
LE pulse width
HIGH
2, 7
1.0
–
1.2
–
2.0
–
ns
tS
Set-up time
An to CP
5, 7
0.3
–0.5
–
0.1
–0.2
–
0
–0.2
–
0.2
–
0
ns
tSU
Set-up time
An to LE
4, 7
0.5
0.1
–
0.6
0.1
–
1.0
0.5
–
1.5
–
0.8
1.5
ns
t
Hold time
An to CP
5, 7
0.9
0.6
–
0.7
0.3
–
0.7
0.3
–
0.6
–
0.3
0.1
ns
th
Hold time
An to LE
4, 7
0.6
0.4
–
0.2
0.1
–
0.1
0
–
0.1
–
0
–0.7
ns
fmax
Maximum clock
pulse frequency
3, 7
500
–
400
–
250
–
MHz
NOTE:
1. All typical values are measured at Tamb = 25 °C and at VCC = 1.8 V, 2.5 V, 3.3 V.
相關PDF資料
PDF描述
935272534118 AVC SERIES, 18 1-BIT DRIVER, TRUE OUTPUT, PDSO56
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