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參數(shù)資料
| 型號： | 935269708118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | CBT/FST/QS/5C/B SERIES, 24 1-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 7.50 MM, PLASTIC, MO-118, SOT-371-1, SSOP3-56 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 69K |
| 代理商： | 935269708118 |
Philips Semiconductors
Product data
CBT16211
24-bit bus switch with 12-bit output enables
2001 Jun 13
5
AC CHARACTERISTICS
GND = 0 V; tR; CL = 50 pF
SYMBOL
PARAMETER
FROM
TO
VCC = 5.0 V ±0.5 V
UNIT
SYMBOL
PARAMETER
(INPUT)
(OUTPUT)
Min
Max
UNIT
tpd
Propagation delay1
A or B
B or A
—
0.25
ns
ten
Output enable time
to High and Low level
OE
A or B
1.5
6.0
ns
tdis
Output disable time
from High and Low level
OE
A or B
1.5
6.0
ns
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
AC WAVEFORMS
VM = 1.5 V, VIN = GND to 3.0 V.
INPUT
1.5 V
OUTPUT
tPLH
tPHL
SA00028
1.5 V
3 V
0 V
VOH
VOL
Waveform 1. Input (An) to Output (Yn) Propagation Delays
Output Control
(Low-level
enabling )
1.5 V
tPZH
tPHZ
VOH
VOL
tPZL
tPLZ
3.5 V
0 V
VOL + 0.3 V
VOH – 0.3 V
SA00029
1.5 V
0 V
3 V
Output
Waveform 1
S1 at 7 V
(see Note)
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
Output
Waveform 2
S1 at Open
(see Note)
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
CL
500
Load Circuit
DEFINITIONS
CL =
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
TEST
S1
tpd
open
tPLZ/tPZL
7 V
tPHZ/tPZH
open
SA00012
500
From Output
Under Test
S1
7 V
Open
GND
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