參數(shù)資料
型號(hào): 93LC46-E/MS
元件分類: PROM
英文描述: 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8
封裝: PLASTIC, MSOP-8
文件頁數(shù): 19/20頁
文件大?。?/td> 510K
代理商: 93LC46-E/MS
93XX46, 93XX46A/B
DS21749A-page 8
2002 Microchip Technology Inc.
2.6
ERASE/WRITE DISABLE AND ENABLE (EWDS/EWEN)
The 93XX46, 93XX46A/B powers up in the ERASE/
WRITE Disable (EWDS) state. All programming modes
must be preceded by an ERASE/WRITE Enable
(EWEN) instruction. Once the EWEN instruction is
executed, programming remains enabled until an EWDS
instruction is executed or Vcc is removed from the
device. To protect against accidental data disturbance,
the EWDS instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READ instruction is indepen-
dent of both the EWEN and EWDS instructions.
FIGURE 2-5:
EWDS TIMING
FIGURE 2-6:
EWEN TIMING
2.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Ver-
sion devices) or 16-bit (If ORG pin is high or B-version
devices) output string. The output data bits will toggle
on the rising edge of the CLK and are stable after the
specified time delay (T
PD). Sequential read is possible
when CS is held high. The memory data will automati-
cally cycle to the next register and output sequentially.
FIGURE 2-7:
READ TIMING
CS
CLK
DI
10
00
0
X
X
T
CSL
1X
CS
CLK
DI
00
1
X
T
CSL
CS
CLK
DI
DO
11
0
An
A0
HIGH-Z
0Dx
D0
Dx
D0
Dx
D0
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