參數(shù)資料
型號(hào): 93LC66BTEPG
廠商: Microchip Technology Inc.
元件分類(lèi): EEPROM
英文描述: 4K Microwire Compatible Serial EEPROM
中文描述: 4K的微絲兼容串行EEPROM
文件頁(yè)數(shù): 23/24頁(yè)
文件大?。?/td> 405K
代理商: 93LC66BTEPG
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
DS21795B-page 8
2003 Microchip Technology Inc.
2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX66A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruc-
tion. Once the EWEN instruction is executed, program-
ming remains enabled until an EWDS instruction is
executed or Vcc is removed from the device.
To protect against accidental data disturbance, the
EWDS
instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READ instruction is indepen-
dent of both the EWEN and EWDS instructions.
FIGURE 2-5:
EWDS TIMING
FIGURE 2-6:
EWEN TIMING
2.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the
specified time delay (TPD). Sequential read is possible
when CS is held high. The memory data will automati-
cally cycle to the next register and output sequentially.
FIGURE 2-7:
READ TIMING
CS
CLK
DI
10
00
0
X
X
TCSL
1X
CS
CLK
DI
00
1
X
TCSL
CS
CLK
DI
DO
11
0
An
A0
HIGH-Z
0Dx
D0
Dx
D0
Dx
D0
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