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參數(shù)資料
| 型號： | 93LC76T-I/SN |
| 元件分類： | PROM |
| 英文描述： | 512 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, MS-012, SOIC-8 |
| 文件頁數(shù)： | 20/22頁 |
| 文件大?。?/td> | 345K |
| 代理商： | 93LC76T-I/SN |
2004 Microchip Technology Inc.
Preliminary
DS21131E-page 7
93LC76/86
3.0
DEVICE OPERATION
3.1
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 16-bit (x16 organization) or 8-bit
(x8 organization) output string. The output data bits will
toggle on the rising edge of the CLK and are stable
after the specified time delay (TPD). Sequential read is
possible when CS is held high and clock transitions
continue.
The
memory
address
pointer
will
automatically increment and output data sequentially.
3.2
ERASE
The ERASE instruction forces all data bits of the
specified address to the logical “1” state. The self-timed
programming cycle is initiated on the rising edge of
CLK as the last address bit (A0) is clocked in. At this
point, the CLK, CS and DI inputs become “don’t cares”.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the register at the specified
address has been erased and the device is ready for
another instruction.
The erase cycle takes 3 ms per word (typical).
3.3
WRITE
The WRITE instruction is followed by 16 bits (or by 8
bits) of data to be written into the specified address.
The self-timed programming cycle is initiated on the
rising edge of CLK as the last data bit (D0) is clocked
in. At this point, the CLK, CS and DI inputs become
“don’t cares”.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the register at the specified
address has been written and the device is ready for
another instruction.
The write cycle takes 3 ms per word (typical).
3.4
Erase All (ERAL)
The ERAL instruction will erase the entire memory array
to the logical “1” state. The ERAL cycle is identical to
the erase cycle except for the different opcode. The
ERAL cycle is completely self-timed and commences
on the rising edge of the last address bit (A0). Note that
the Least Significant 8 or 9 address bits are “don’t care”
bits, depending on selection of x16 or x8 mode. Clock-
ing of the CLK pin is not necessary after the device has
entered the self clocking mode. The ERAL instruction is
ensured at VCC = +4.5V to +6.0V.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the entire device has been
erased and is ready for another instruction.
The ERAL cycle takes 15 ms maximum (8 ms typical).
3.5
Write All (WRAL)
The WRAL instruction will write the entire memory array
with the data specified in the command. The WRAL
cycle is completely self-timed and commences on the
rising edge of the last address bit (A0). Note that the
Least Significant 8 or 9 address bits are “don’t cares”,
depending on selection of x16 or x8 mode. Clocking of
the CLK pin is not necessary after the device has
entered the self clocking mode. The WRAL command
does include an automatic ERAL cycle for the device.
Therefore, the WRAL instruction does not require an
ERAL
instruction but the chip must be in the EWEN
status. The WRAL instruction is ensured at Vcc = +4.5V
to +6.0V.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the entire device has been
written and is ready for another instruction.
The WRAL cycle takes 30 ms maximum (16 ms
typical).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 93LC86T-I/SNG | 1K X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC86T-I/SN | 1K X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC86T/SN | 1K X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC76T/SN | 512 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC86TI/SN | 1K X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 93LC86/P | 功能描述:電可擦除可編程只讀存儲器 1024x16-2048x8 PDIP8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 93LC86-/P | 制造商:Microchip Technology 功能描述:16k(2k~8 / 1k~16) 2MHz 2.5V to 5.5V VA / Microwire 8DIP Bulk |
| 93LC86/P | 制造商:Microchip Technology Inc 功能描述:EEPROM IC Memory Type:Serial EEPROM |
| 93LC86/PG | 制造商:Microchip Technology 功能描述:EEPROM Serial-3Wire 16K-bit 2K x 8/1K x 16 3.3V/5V 8-Pin PDIP |
| 93LC86/SN | 功能描述:電可擦除可編程只讀存儲器 1024x16-2048x8 SOIC8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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