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參數(shù)資料
| 型號： | 93LC86-I/P |
| 元件分類： | PROM |
| 英文描述： | 1K X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-8 |
| 文件頁數(shù)： | 17/22頁 |
| 文件大?。?/td> | 345K |
| 代理商： | 93LC86-I/P |
93LC76/86
DS21131E-page 4
Preliminary
2004 Microchip Technology Inc.
TABLE 1-2:
AC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted:
VCC = +2.5V to +6.0V
Commercial (C): TA = 0°C to +70°C
Industrial
(I): TA = -40°C to +85°C
Parameter
Symbol
Min.
Max.
Units
Conditions
Clock frequency
FCLK
—3
2
MHz
4.5V
≤ VCC ≤ 6.0V
2.5V
≤ VCC < 4.5V
Clock high time
TCKH
200
300
—ns
ns
4.5V
≤ VCC ≤ 6.0V
2.5V
≤ VCC < 4.5V
Clock low time
TCKL
100
200
—ns
ns
4.5V
≥ VCC ≤ 6.0V
2.5V
≤ VCC < 4.5V
Chip select setup time
TCSS
50
100
—ns
ns
4.5V
≤ VCC ≤ 6.0V, Relative to CLK
2.5V
≤ VCC < 4.5V, Relative to CLK
Chip select hold time
TCSH
0—
ns
—
Chip select low time
TCSL
250
—
ns
Relative to CLK
Data input setup time
TDIS
50
100
—ns
ns
4.5V
≤ VCC ≤ 6.0V, Relative to CLK
2.5V
≤ VCC <4.5V, Relative to CLK
Data input hold time
TDIH
50
100
—ns
ns
4.5V
≤ VCC ≤ 6.0V, Relative to CLK
2.5V
≤ VCC < 4.5V, Relative to CLK
Data output delay time
TPD
—100
250
ns
4.5V
≤ VCC ≤ 6.0V, CL = 100 pF
2.5V
≤ VCC < 4.5V, CL = 100 pF
Data output disable time
TCZ
—100
500
ns
4.5V
≤ VCC ≤ 6.0V
2.5V
Status valid time
Tsv
—
200
300
ns
4.5V
≥ VCC ≤ 6.0V, CL = 100 pF
2.5V
≤ VCC <4.5V, CL = 100 pF
Program cycle time
TWC
—
5
ms
Erase/Write mode
TEC
—
15
ms
ERAL mode
TWL
—30
ms
WRAL mode
Endurance
—
1M
—
cycles
25°C, Vcc = 5.0V, Block mode
Note 1:
This parameter is periodically sampled and not 100% tested.
2:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained from Microchip’s web site at
www.microchip.com.
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