參數(shù)資料
型號: 93V855AGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-28
文件頁數(shù): 5/10頁
文件大?。?/td> 93K
代理商: 93V855AGI
4
ICS93V855I
0783C—06/01/04
DC Electrical Characteristics
TA = -45°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDDQ, AVDD
2.3
2.5
2.7
V
Low level input voltage
VIL
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.4
VDD/2 - 0.18
V
High level input voltage
VIH
CLK_INT, CLK_INC, FB_INC,
FB_INT
VDD/2 + 0.18
2.1
V
DC input signal voltage (note
2)
VIN
-0.3
VDD + 0.3
V
DC - CLK_INT, CLK_INC,
FB_INC, FB_INT
0.36
VDD + 0.6
V
AC - CLK_INT, CLK_INC,
FB_INC, FB_INT
0.7
VDD + 0.6
V
Output differential cross-
voltage (note 4)
VOX
VDD/2 - 0.15
VDD/2 + 0.15
V
Input differential cross-
voltage (note 4)
VIX
VDD/2 - 0.2
VDD/2
VDD/2 + 0.2
V
Operating free-air
temperature
TA
-45
85
°C
Differential input signal
voltage (note 3)
VID
Notes:
1
2
3
4
Differential inputs signal voltages specifies the differential voltage [VT-VCP] required for switching,
where VTR is the true input level and VCP is the complementary input level.
Differential cross-point voltage is expected to track variations of VDD and is the voltage at which the
differential signal must be crossing.
Unused inputs must be held high or low to prevent them from floating.
DC input signal voltage specifies the allowable DC excursion of differential input.
相關(guān)PDF資料
PDF描述
93V857BG-025LF-T 93V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
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