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參數(shù)資料
| 型號(hào)： | 9701-01 |
| 廠商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | 3000 MHz UltraCMOS⑩ Integer-N PLL Rad Hard for Space Applications |
| 中文描述： | PHASE LOCKED LOOP, CQCC44 |
| 封裝： | CERAMIC, QFJ-44 |
| 文件頁數(shù)： | 10/13頁 |
| 文件大?。?/td> | 280K |
| 代理商： | 9701-01 |
Product Specification
PE9701
Page 6 of 13
2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0035-02
│ UltraCMOS RFIC Solutions
Table 6. AC Characteristics: VDD = 3.0 V, -40° C < TA < 85° C, unless otherwise specified
Note 1:
Fclk is verified during the functional pattern test. Serial programming sections of the functional pattern are clocked at 10 MHz to verify Fclk
specification.
Note 2:
CMOS logic levels can be used to drive reference input if DC coupled. Voltage input needs to be a minimum of 0.5 Vp-p.
Note 3:
Parameter is guaranteed through characterization only, and is not tested.
Symbol
Parameter
Conditions
Min
Max
Units
Control Interface and Latches (see Figures 4, 5, 6)
fClk
Serial data clock frequency
(Note 1)
10
MHz
tClkH
Serial clock HIGH time
30
ns
tClkL
Serial clock LOW time
30
ns
tDSU
Sdata hold time after Sclk rising edge, D[7:0] set-up time to
M1_WR, M2_WR, A_WR, E_WR rising edge
10
ns
tDHLD
Sdata hold time after Sclk rising edge, D[7:0] hold time to
M1_WR, M2_WR, A_WR, E_WR rising edge
10
ns
tPW
S_WR, M1_WR, M2_WR, A_WR, E_WR pulse width
30
ns
tCWR
Sclk rising edge to S_WR rising edge. S_WR, M1_WR,
M2_WR, A_WR falling edge to Hop_WR rising edge
30
ns
tCE
Sclk falling edge to E_WR transition
30
ns
tWRC
S_WR falling edge to Sclk rising edge. Hop_WR falling
edge to S_WR, M1_WR, M2_WR, A_WR rising edge
30
ns
tEC
E_WR transition to Sclk rising edge
30
ns
tMDO
MSEL data out delay after Fin rising edge
CL = 12 pf
8
ns
Main Divider (Prescaler Enabled)
Fin
Operating frequency
500
3000
MHz
PFin
Input level range
External AC coupling
-5
5
dBm
Main Divider (Prescaler Bypassed)
Fin
Operating frequency
50
300
MHz
PFin
Input level range
External AC coupling
-5
5
dBm
Reference Divider
fr
Operating frequency
(Note 3)
100
MHz
Pfr
Reference input power (Note 2)
Single-ended input
-2
dBm
Phase Detector
fc
Comparison frequency
(Note 3)
20
MHz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9701-0259 | 功能描述:近程傳感器 IRAL-50 -S1 - -2030VDC;50mA -NPN- -QD59-HSDO RoHS:否 制造商:Vishay Semiconductors 感應(yīng)方式:Optical 感應(yīng)距離:1 mm to 200 mm 電源電壓:2.5 V to 3.6 V 安裝風(fēng)格:SMD/SMT 輸出配置:Digital 最大工作溫度:+ 85 C 最小工作溫度:- 25 C 系列:VCNL3020 |
| 9701032SS | 制造商:n/a 功能描述:Ships in 2 days |
| 970-10360000BO100 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Industrial Sensor for Harsh Environment (Throttle Position/Through Hole) |
| 970-1036-0001 | 制造商:Vishay Spectrol 功能描述:POTENTIOMETER ROTARY 5KOHM 30% 制造商:Vishay Spectrol 功能描述:POTENTIOMETER, ROTARY, 5KOHM, 30% 制造商:Vishay Spectrol 功能描述:POTENTIOMETER, ROTARY, 5KOHM, 30%; Track Resistance:5kohm; Track Taper:Linear; Resistance Tolerance: 30%; Potentiometer Mounting:Through Hole; No. of Gangs:1; MSL:-; Leaded Process Compatible:Yes; Linearity %:2%; Series:970 ;RoHS Compliant: Yes 制造商:Vishay Spectrol 功能描述:POTENTIOMETER, ROTARY, 5KOHM, 30%; Track Resistance:5kohm; Track Taper:Linear; Resistance Tolerance: 30%; Potentiometer Mounting:Through Hole; No. of Gangs:1; Leaded Process Compatible:Yes; Linearity %:2%; MSL:(Not Available) ;RoHS Compliant: Yes |
| 970-10360001BO100 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Industrial Sensor for Harsh Environment (Throttle Position/Through Hole) |
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