參數(shù)資料
型號: 97SD3232RPQH
廠商: MAXWELL TECHNOLOGIES
元件分類: DRAM
英文描述: 32M X 32 SYNCHRONOUS DRAM, 6 ns, PQFP132
封裝: QFP-132
文件頁數(shù): 20/39頁
文件大小: 764K
代理商: 97SD3232RPQH
97SD3232
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All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
1 Gb (8-Meg X 32-Bit X 4-Banks) SDRAM
02.04.05 Rev 3
Write command to READ command interval:
1. Same bank, same ROW address: When the read command is executed at the same ROW address of
the same bank as the preceding write command, the read command can be performed after an interval of no
less than 1 clock. However, in the case of a burst write, data will continue to be written until one clock before
the read command is executed.
WRITE to READ Command Interval (1)
Write to READ Command Interval (2)
2. Same bank, different ROW address: When the ROW address changes, consecutive read commands
cannot be executed; it is necessary to separate the two commands with a precharge command and a bank-
active command.
3. Different bank: When the bank changes, the read command can be performed after an interval of no less
than 1 clock, provided that the other bank is in the bank-active state. However, in the case of a burst write,
data will continue to be written until one clock before the read command is executed (as in the case of the
same bank and the same address).
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97SD3232RPQI 32M X 32 SYNCHRONOUS DRAM, 6 ns, PQFP132
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