參數(shù)資料
型號(hào): 9DB306BL
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 時(shí)鐘及定時(shí)
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: 4.40 X 9.70 MM, 0.925 MM HEIGHT, TSSOP-28
文件頁(yè)數(shù): 13/17頁(yè)
文件大小: 268K
代理商: 9DB306BL
ICS9DB306BL REVISION C AUGUST 13, 2009
5
2009 Integrated Device Technology, Inc.
ICS9DB306 Data Sheet
PCI EXPRESS JITTER ATTENUATOR
TYPICAL PHASE NOISE AT 100MHZ
The illustrated phase noise plot was taken using a low phase
noise signal generator, the noise floor of the signal generator is
less than that of the device under test.
Using this configuration allows one to see the true spectral purity
or phase noise performance of the PLL in the device under test.
Due to the tracking ability of a PLL, it will track the input signal up
to its loop bandwidth. Therefore, if the input phase noise is greater
than that of the PLL, it will increase the output phase noise
performance of the device. It is recommended that the phase
noise performance of the input is verified in order to achieve the
above phase noise performance.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k
10k
100k
1M
10M
100M
100MHz
RMS Phase Jitter (Random)
1.5MHz to 22MHz = 3ps (typical)
OFFSET FREQUENCY (HZ)
N
OISE
P
O
WER
dBc
Hz
Phase Noise Result by adding
PCI Express Filter to raw data
PCI Express Filter
Raw Phase Noise Data
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參數(shù)描述
9DB306BLI 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK BFFR SGL 28TSSOP - Rail/Tube
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9DB306BLILFT 功能描述:IC JITTER ATTENUATOR 28-TSSOP 制造商:idt, integrated device technology inc 系列:- 包裝:帶卷(TR) 零件狀態(tài):過(guò)期 PLL:是 主要用途:PCI Express(PCIe) 輸入:HCSL,LVDS,LVHSTL,LVPECL,SSTL 輸出:LVPECL 電路數(shù):1 比率 - 輸入:輸出:1:6 差分 - 輸入:輸出:是/是 頻率 - 最大值:140MHz 電壓 - 電源:2.97 V ~ 3.63 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-TSSOP(0.173",4.40mm 寬) 供應(yīng)商器件封裝:28-TSSOP 標(biāo)準(zhǔn)包裝:1,000
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