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參數(shù)資料
| 型號(hào)： | 9DB833AFILFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封裝： | ROHS COMPLIANT, SSOP-48 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 226K |
| 代理商： | 9DB833AFILFT |
9DB833
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3
IDT
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3
3
9DB833
REV C 052411
Pin Descriptions
PIN #
PIN NAME
PIN TYPE
DESCR IPTION
1SRC_DIV#
IN
Active low Input for determining SRC output frequency SRC or SRC/2.
0 = SRC/2, 1= SRC
2VDDR
PWR
3.3V power for differential input clock (receiver). This VDD should be treated as an
analog power rail and filtered appropriately.
3
GND
PWR
Ground pin.
4
SRC_IN
IN
0.7 V D ifferential SR C TRUE input
5
SRC_IN#
IN
0.7 V D ifferential SR C COMPLEMENTAR Y input
6OE0#
IN
Active low input for enabling DIF pair 0.
1 =disable outputs, 0 = enable outputs
7OE3#
IN
Active low input for enabling DIF pair 3.
1 =disable outputs, 0 = enable outputs
8
DIF_0
OUT
0.7V differential true clock output
9
DIF_0#
OUT
0.7V differential Complementary clock output
10
GND
PWR
Ground pin.
11
VDD
PWR
Power supply, nominal 3.3V
12
DIF_1
OUT
0.7V differential true clock output
13
DIF_1#
OUT
0.7V differential Complementary clock output
14
OE1#
IN
Active low input for enabling DIF pair 1.
1 =disable outputs, 0 = enable outputs
15
OE2#
IN
Active low input for enabling DIF pair 2.
1 =disable outputs, 0 = enable outputs
16
DIF_2
OUT
0.7V differential true clock output
17
DIF_2#
OUT
0.7V differential Complementary clock output
18
GND
PWR
Ground pin.
19
VDD
PWR
Power supply, nominal 3.3V
20
DIF_3
OUT
0.7V differential true clock output
21
DIF_3#
OUT
0.7V differential Complementary clock output
22
BYP#_HIBW_LOBW
IN
Tri-level input to select bypass mode, Hi BW PLL, or Lo BW PLL mode
23
SMBC LK
IN
Clock pin of SMBUS circuitry, 5V tolerant
24
SMBD AT
I/O
Data pin of SMBUS circuitry, 5V tolerant
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9DB833AFLF | 功能描述:時(shí)鐘緩沖器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB833AFLFT | 功能描述:時(shí)鐘緩沖器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB833AGILF | 功能描述:時(shí)鐘緩沖器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB833AGILFT | 功能描述:時(shí)鐘緩沖器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB833AGLF | 功能描述:時(shí)鐘緩沖器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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