參數(shù)資料
型號(hào)： 9EPRS488CKLF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQCC72
封裝： ROHS COMPLIANT, PLASTIC, MLF-72
文件頁(yè)數(shù)： 3/22頁(yè)
文件大小： 266K
代理商： 9EPRS488CKLF
11
Integrated
Circuit
Systems, Inc.
ICS9EPRS488
Datasheet
1616—08/20/09
AC Electrical Characteristics - Low-Power DIF Outputs: SRC, SB_SRC and ATIG
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Rising Edge Slew Rate
tSLR
Differential Measurement
0.6
4
V/ns
1,2
Falling Edge Slew Rate
tFLR
Differential Measurement
0.6
4
V/ns
1,2
Slew Rate Variation
tSLVAR
Single-ended Measurement
20
%
1
Maximum Output Voltage
VHIGH
Includes overshoot
1150
mV
1
Minimum Output Voltage
VLOW
Includes undershoot
-300
mV
1
Differential Voltage Swing
VSWING
Differential Measurement
300
mV
1
Crossing Point Voltage
VXABS
Single-ended Measurement
300
550
mV
1,3,4
Crossing Point Variation
VXABSVAR
Single-ended Measurement
140
mV
1,3,5
Duty Cycle
DCYC
Differential Measurement
45
55
%
1
SRC, ATIG, Jitter - Cycle to
Cycle
SRCJC2C
Differential Measurement
125
ps
1
SRC[5:0] Skew
SRCSKEW
Differential Measurement
250
ps
1
SB_SRC[1:0] Skew
SRCSKEW
Differential Measurement
100
ps
1
ATIG[2:0] Skew
SRCSKEW
Differential Measurement
100
ps
1
Notes on Electrical Characteristics:
1Guaranteed by design and characterization, not 100% tested in production.
2 Slew rate measured through Vswing centered around differential zero
3 Vxabs is defined as the voltage where CLK = CLK#
4 Only applies to the differential rising edge (CLK rising and CLK# falling)
6 All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
5 Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Notes
Long Accuracy
ppm
see Tperiod min-max values
-100
100
ppm
1,2
66.67MHz output nominal
14.9955
15.0045
ns
2
66.67MHz output spread
14.9955
15.0799
ns
2
Output High Voltage
VOH
IOH = -1 mA
1.6
1.8
3.3
V
1
Output Low Voltage
VOL
IOL = 1 mA
0
0.2
V
1
Rise Time
tr1
VOL = 0.36 V, VOH = 1.44 V
1.5
ns
1
Fall Time
tf1
VOH = 1.44 V, VOL = 0.36 V
1.5
ns
1
Duty Cycle
dt1
VT = 0.9 V
45
55
%
1
Jitter, Cycle to cycle
tjcyc-cyc
VT = 0.9 V
300
ps
1
Jitter, Long Term
tLTJ
VT = 0.9 V
1
ns
1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 22 (unless otherwise specified)
1Guaranteed by design and characterization, not 100% tested in production.
2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that REF is at 14.31818MHz
HTT66 Clock period
Tperiod
Electrical Characteristics - Single-ended HTT 66MHz Clock
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