參數(shù)資料
型號: 9EX21831AKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
封裝: ROHS COMPLIANT, PLASTIC, MLF-72
文件頁數(shù): 2/17頁
文件大?。?/td> 179K
代理商: 9EX21831AKLFT
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
9EX21831
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
10
Common Recommendations for Differential Routing
Dimension or Value
Unit
Figure
L1 length, route as non-coupled 50ohm trace
0.5 max
inch
1
L2 length, route as non-coupled 50ohm trace
0.2 max
inch
1
L3 length, route as non-coupled 50ohm trace
0.2 max
inch
1
Rs
33
ohm
1
Rt
49.9
ohm
1
Down Device Differential Routing
L4 length, route as coupled microstrip 100ohm differential trace 2 min to 16 max
inch
1
L4 length, route as coupled stripline 100ohm differential trace
1.8 min to 14.4 max
inch
1
Differential Routing to PCI Express Connector
L4 length, route as coupled microstrip 100ohm differential trace 0.25 to 14 max
inch
2
L4 length, route as coupled stripline 100ohm differential trace
0.225 min to 12.6 max
inch
2
DIF Reference Clock
HCSL Output Buffer
L1
L1'
Rs
L2
L2'
Rs
L4'
L4
L3
L3'
Rt
PCI Express
Down Device
REF_CLK Input
Figure 1: Down Device Routing
HCSL Output Buffer
L1
L1'
Rs
L2
L2'
Rs
L4'
L4
L3
L3'
Rt
PCI Express
Add-in Board
REF_CLK Input
Figure 2: PCI Express Connector Routing
相關(guān)PDF資料
PDF描述
9EX21831AKLF 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
9FG104DGLFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
9FG104DFLF 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
9FG104DGILF 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
9FG104DFILFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
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