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參數(shù)資料
| 型號： | 9FG430AGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 205K |
| 代理商： | 9FG430AGLFT |
IDT Four Output Differential Frequency Generator for PCIe Gen3 and QPI
1681C—08/26/10
9FG430
Four Output Differential Frequency Generator for PCIe Gen3 and QPI
15
SMBus Table: PLL Frequency Control Register
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
PLL N Div7
RW
X
Bit 6
PLL N Div6
RW
X
Bit 5
PLL N Div5
RW
X
Bit 4
PLL N Div4
RW
X
Bit 3
PLL N Div3
RW
X
Bit 2
PLL N Div2
RW
X
Bit 1
PLL N Div1
RW
X
Bit 0
PLL N Div0
RW
X
SMBus Table: PLL Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
PLL SSP7
RW
X
Bit 6
PLL SSP6
RW
X
Bit 5
PLL SSP5
RW
X
Bit 4
PLL SSP4
RW
X
Bit 3
PLL SSP3
RW
X
Bit 2
PLL SSP2
RW
X
Bit 1
PLL SSP1
RW
X
Bit 0
PLL SSP0
RW
X
SMBus Table: PLL Spread Spectrum Control Register
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
0
Bit 6
PLL SSP14
RW
X
Bit 5
PLL SSP13
RW
X
Bit 4
PLL SSP12
RW
X
Bit 3
PLL SSP11
RW
X
Bit 2
PLL SSP10
RW
X
Bit 1
PLL SSP9
RW
X
Bit 0
PLL SSP8
RW
X
-
Spread Spectrum
Programming bit(14:8)
These Spread Spectrum bits in
Byte 12 and 13 will program the
spread pecentage of PLL. The
user does not need to modify
these settings unless non-
standard spread amounts are
required. The part defaults to -
0.5% spread when spread is
enabled.
-
Byte 13
-
Reserved
Byte 12
-
Spread Spectrum
Programming bit(7:0)
These Spread Spectrum bits in
Byte 12 and 13 will program the
spread pecentage of PLL. The
user does not need to modify
these settings unless non-
standard spread amounts are
required. The part defaults to -
0.5% spread when spread is
enabled.
-
The decimal representation of M
and N Divider in Byte 10 and 11 will
configure the PLL VCO frequency.
Default at power up = latch-in or
Byte 0 Rom table. VCO Frequency
= fXTAL x [NDiv(9:0)+8] /
[MDiv(5:0)+2]. The user does NOT
need to program these resgisters
for standard frequencies.
-
Byte 11
-
N Divider Programming
Byte11 bit(7:0) and Byte10
bit(7:6)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9FG431AFILF | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 4 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG431AFILFT | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 4 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG431AFLF | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 4 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG431AFLFT | 功能描述:時鐘合成器/抖動清除器 PCIE SYNTHESIZER - GEN3, 4 OUTPUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG431AGILF | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 PCIE SYNTHESIZER - GEN3, 4 OUTPUT RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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