參數(shù)資料
型號(hào): 9UMS9001YKLF-T
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 時(shí)鐘產(chǎn)生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC14
封裝: ROHS COMPLIANT, PLASTIC, MLF-56
文件頁(yè)數(shù): 14/15頁(yè)
文件大?。?/td> 113K
代理商: 9UMS9001YKLF-T
IDTTM/ICSTM PC MAIN CLOCK - CK540
1247A—08/28/08
Advance Information
ICS9UMS9001
PC MAIN CLOCK - CK540
8
Electrical Characteristics - USB48MHz
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS NOTES
Long Accuracy
ppm
see Tperiod min-max values
-100
100
ppm
1,2
Clock period
T
period
48.00MHz output nominal
20.83125
20.83542
ns
2
Absolute min/max period
T
abs
48.00MHz output nominal
20.48130
21.18540
ns
2
Output High Voltage
V
OH
I
OH = -1 mA
2.4
V
1
Output Low Voltage
V
OL
I
OL = 1 mA
0.4
V
1
V
OH @MIN = 1.0 V
-29
mA
1
V
OH@MAX = 3.135 V
-23
mA
1
V
OL @ MIN = 1.95 V
29
mA
1
V
OL @ MAX = 0.4 V
27
mA
1
Rising Edge Slew Rate
t
SLR
Measured from 0.8 to 2.0 V
1
2
V/ns
1
Falling Edge Slew Rate
t
FLR
Measured from 2.0 to 0.8 V
1
2
V/ns
1
Duty Cycle
d
t1
V
T = 1.5 V
45
55
%
1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T = 1.5 V
350
ps
1
Output High Current
I
OH
I
OL
Output Low Current
Electrical Characteristics - SMBus Interface
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Notes
SMBus Voltage
V
DD
2.7
5.5
V
1
Low-level Output Voltage
V
OLSMB
@ I
PULLUP
0.4
V
1
Current sinking at
V
OLSMB = 0.4 V
I
PULLUP
SMB Data Pin
4
mA
1
SCLK/SDATA
Clock/Data Rise Time
T
RI2C
(Max VIL - 0.15) to
(Min VIH + 0.15)
1000
ns
1
SCLK/SDATA
Clock/Data Fall Time
T
FI2C
(Min VIH + 0.15) to
(Max VIL - 0.15)
300
ns
1
Maximum SMBus Operating
Frequency
F
SMBUS
Block Mode
100
kHz
1
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