A1 42 5A T i m i n g C har a c t e r i st i c s (continued) (W or" />
參數(shù)資料
型號(hào): A1010B-1PQ100C
廠商: Microsemi SoC
文件頁(yè)數(shù): 33/98頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 1200 GATES 100-PQFP COM
標(biāo)準(zhǔn)包裝: 66
系列: ACT™ 1
LAB/CLB數(shù): 295
輸入/輸出數(shù): 57
門數(shù): 1200
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 100-BQFP
供應(yīng)商設(shè)備封裝: 100-PQFP(14x20)
39
Hi R e l F P GA s
A1 42 5A T i m i n g C har a c t e r i st i c s (continued)
(W or s t - C as e M i l i t a r y Cond i t i o n s , V CC = 4.5 V, TJ = 1 25°C)
‘–1’ Speed
‘Std’ Speed
Parameter
Description
Min.
Max.
Min.
Max.
Units
Routed Array Clock Networks
tRCKH
Input Low to High (FO=64)
5.5
6.4
ns
tRCKL
Input High to Low (FO=64)
6.0
7.0
ns
tRPWH
Min. Pulse Width High (FO=64)
4.9
5.7
ns
tRPWL
Min. Pulse Width Low (FO=64)
4.9
5.7
ns
tRCKSW
Maximum Skew (FO=128)
1.1
1.2
ns
tRP
Minimum Period (FO=64)
10.1
11.6
ns
fRMAX
Maximum Frequency (FO=64)
100
85
MHz
Clock-to-Clock Skews
tIOHCKSW
I/O Clock to H-Clock Skew
0.0
3.0
0.0
3.0
ns
tIORCKSW
I/O Clock to R-Clock Skew
0.0
3.0
0.0
3.0
ns
tHRCKSW
H-Clock to R-Clock Skew
(FO = 64)
(FO = 50% max.)
0.0
1.0
3.0
0.0
1.0
3.0
ns
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