A3 22 00 DX Ti m i n g Ch ar ac te r i st i c s (continued) (Wors" />
參數(shù)資料
型號: A1020B-PG84C
廠商: Microsemi SoC
文件頁數(shù): 51/98頁
文件大?。?/td> 0K
描述: IC FPGA 2K GATES 84-CPGA COM
標(biāo)準(zhǔn)包裝: 21
系列: ACT™ 1
LAB/CLB數(shù): 547
輸入/輸出數(shù): 69
門數(shù): 2000
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 通孔
工作溫度: 0°C ~ 70°C
封裝/外殼: 84-BCPGA
供應(yīng)商設(shè)備封裝: 84-CPGA(28x28)
55
Hi R e l F P GA s
A3 22 00 DX Ti m i n g Ch ar ac te r i st i c s (continued)
(Wors t-C ase Mi litary Conditions , V CC = 4.5V, TJ = 125°C)
‘–1’ Speed
‘Std’ Speed
Parameter
Description
Min.
Max.
Min.
Max.
Units
TTL Output Module Timing1
tDLH
Data to Pad High
5.1
6.8
ns
tDHL
Data to Pad Low
6.3
8.3
ns
tENZH
Enable Pad Z to High
6.6
8.8
ns
tENZL
Enable Pad Z to Low
7.1
9.5
ns
tENHZ
Enable Pad High to Z
11.5
15.3
ns
tENLZ
Enable Pad Low to Z
11.5
15.3
ns
tGLH
G to Pad High
11.5
15.3
ns
tGHL
G to Pad Low
12.3
16.5
ns
tLSU
I/O Latch Output Setup
0.4
0.5
ns
tLH
I/O Latch Output Hold
0.0
ns
tLCO
I/O Latch Clock-Out (Pad-to-Pad) 32 I/O
11.5
15.4
ns
tACO
Array Latch Clock-Out (Pad-to-Pad) 32 I/O
16.3
21.7
ns
dTLH
Capacitive Loading, Low to High
0.04
0.06
ns/pF
dTHL
Capacitive Loading, High to Low
0.06
0.08
ns/pF
tWDO
Hard-Wired Wide Decode Output
0.05
0.07
ns
CMOS Output Module Timing1
tDLH
Data to Pad High
5.1
6.8
ns
tDHL
Data to Pad Low
6.3
8.3
ns
tENZH
Enable Pad Z to High
6.6
8.8
ns
tENZL
Enable Pad Z to Low
7.1
9.5
ns
tENHZ
Enable Pad High to Z
11.5
15.3
ns
tENLZ
Enable Pad Low to Z
11.5
15.3
ns
tGLH
G to Pad High
11.5
15.3
ns
tGHL
G to Pad Low
12.3
16.5
ns
tLSU
I/O Latch Setup
0.4
0.5
ns
tLH
I/O Latch Hold
0.0
ns
tLCO
I/O Latch Clock-Out (Pad-to-Pad) 32 I/O
13.7
18.2
ns
tACO
Array Latch Clock-Out (Pad-to-Pad) 32 I/O
19.2
25.6
ns
dTLH
Capacitive Loading, Low to High
0.06
0.08
ns/pF
dTHL
Capacitive Loading, High to Low
0.05
0.07
ns/pF
tWDO
Hard-Wired Wide Decode Output
0.05
0.07
ns
Notes:
1.
Delays based on 35 pF loading.
2.
SSO information can be found in the Simultaneously Switching Output Limits for Actel FPGAs application note at
http://www.actel.com/appnotes.
相關(guān)PDF資料
PDF描述
170-009-173L000 CONN DB9 CRIMP MALE NICKEL
HBC65DRAI-S734 CONN EDGECARD 130PS .100 R/A PCB
EP1S20F780C7 IC STRATIX FPGA 20K LE 780-FBGA
ACC50DREI-S734 CONN EDGECARD 100PS .100 EYELET
ABC50DREI-S734 CONN EDGECARD 100PS .100 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A1020B-PG84E 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
A1020B-PG84M 制造商:Microsemi Corporation 功能描述:4K GATES FPGA 制造商:Microsemi Corporation 功能描述:IC FPGA 69 I/O 84CPGA 制造商:Microsemi Corporation 功能描述:IC FPGA 2K GATES 84-CPGA MIL
A1020B-PL44C 功能描述:IC FPGA 2K GATES 44-PLCC COM RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ACT™ 1 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)
A1020B-PL44I 功能描述:IC FPGA 2K GATES 44-PLCC IND RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ACT™ 1 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)
A1020B-PL68C 功能描述:IC FPGA 2K GATES 68-PLCC COM RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ACT™ 1 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)