參數(shù)資料
型號： A1180LUA-T
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PSIP3
封裝： ULTRA MINI, LEAD FREE, SIP-3
文件頁數(shù)： 14/16頁
文件大?。?/td> 534K
代理商： A1180LUA-T
Sensitive Two-Wire Field-Programmable
Chopper-Stabilized Unipolar Hall Effect Switches
A1180, A1181,
A1182,
and
A1183
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
V
PH
V+
t
V
PM
V
PL
0
Address 1
Address 2
Address
n
(
≤
31)
Figure 8. Pulse sequence to select addresses
Falling edge of final B
OP
address digit
V
PH
V+
t
V
PM
V
PL
0
Encode Lock Bit
Enable
Address
Blow
32 pulses
Figure 9. Pulse sequence to encode lock bit
Lock Bit Programming
.
After the desired B
OP
calibration value
is programmed, and all of the corresponding bit
fi
eld-level fuses
are blown, the device-level fuse should be blown. To do so, the
lock bit (bit
fi
eld address 32) should be encoded as 1 and have
its fuse blown. This is done in the same manner as permanently
setting the other bit
fi
elds, as shown in
fi
gure 9.
Address Selection
.
After addressing mode is enabled, the
target bit
fi
eld address, is indicated by a series of V
PM
pulses, as
shown in
fi
gure 8.
Figure 7. Addressing mode enable pulse sequence
V
PH
V+
t
V
PM
V
PL
0
Enabling Addressing Mode
.
The
fi
rst segment of code is a
keying sequence used to enable the bit
fi
eld addressing mode. As
shown in
fi
gure 7, this segment consists of one short V
PH
pulse,
one V
PM
pulse, and one short V
PH
pulse, with no supply inter-
ruptions. This sequence is designed to prevent the device from
being programmed accidentally, such as by noise on the supply
line.
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