參數(shù)資料
型號: A1225A-1PQ100I
廠商: Microsemi SoC
文件頁數(shù): 1/54頁
文件大?。?/td> 0K
描述: IC FPGA 2500 GATES 100-PQFP IND
產(chǎn)品變化通告: A1225A Family Discontinuation 18/Apr/2012
標準包裝: 66
系列: ACT™ 2
LAB/CLB數(shù): 451
輸入/輸出數(shù): 83
門數(shù): 2500
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-BQFP
供應(yīng)商設(shè)備封裝: 100-PQFP(14x20)
January 2012
I
2012 Microsemi Corporation
ACT 2 Family FPGAs
Features
Up to 8,000 Gate Array Gates
(20,000 PLD equivalent gates)
Replaces up to 200 TTL Packages
Replaces up to eighty 20-Pin PAL Packages
Design Library with over 500 Macro Functions
Single-Module Sequence Functions
Wide-Input Combinatorial Functions
Up to 1,232 Programmable Logic Modules
Up to 998 Flip-Flops
Datapath Performance at 105 MHz
16-Bit Accumulator Performance to 39 MHz
Two In-Circuit Diagnostic Probe Pins Support Speed
Analysis to 50 MHz
Two High-Speed, Low-Skew Clock Networks
I/O Drive to 10 mA
Nonvolatile, User Programmable
Logic Fully Tested Prior to Shipment
1.0 micron CMOS Technology
Table 1 ACT 2 Product Family Profile
Device
A1225A
A1240A
A1280A
Capacity
Gate Array Equivalent Gates
2,500
4,000
8,000
PLD Equivalent Gates
6,250
10,000
20,000
TTL Equivalent Package
63
100
200
20-Pin PAL Equivalent Packages
25
40
80
Logic Modules
451
684
1,232
S-Module
231
348
624
C-Module
220
336
608
Flip-Flops (maximum)
382
568
998
Routing Resources
Horizontal Tracks/Channel
36
Vertical Tracks/Channel
15
PLICE Antifuse Elements
250,000
400,000
750,000
User I/Os (maximum)
83
104
140
Performance1
16-Bit Prescaled Counters
105 MHz
100 MHz
85 MHz
16-Bit Loadable Counters
70 MHz
69 MHz
67 MHz
16-Bit Accumulators
39 MHz
38 MHz
36 MHz
Packages2
CPGA
PLCC
PQFP
VQFP
TQFP
CQFP
PG100
PL84
PQ100
VQ100
PG132
PL84
PQ144
TQ176
PG176
PL84
PQ160
TQ176
CQ172
Notes:
1. Performance is based on –2 speed devices at commercial worst-case operating conditions using PREP Benchmarks, Suite #1,
Version 1.2, dated 3-28-93. Any analysis is not endorsed by PREP.
2. See the "Product Plan" on page III for package availability.
Revision 8
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