The ACT 2 family represents Actel’s second generation of
參數(shù)資料
型號: A1225A-PQG100C
廠商: Microsemi SoC
文件頁數(shù): 45/54頁
文件大?。?/td> 0K
描述: IC FPGA 2500 GATES 100-PQFP COM
產(chǎn)品變化通告: A1225A Family Discontinuation 18/Apr/2012
標(biāo)準(zhǔn)包裝: 66
系列: ACT™ 2
LAB/CLB數(shù): 451
輸入/輸出數(shù): 83
門數(shù): 2500
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 100-BQFP
供應(yīng)商設(shè)備封裝: 100-PQFP(14x20)
R e visio n 8
1 -1
1 – ACT 2 Family Overview
General Description
The ACT 2 family represents Actel’s second generation of field programmable gate arrays
(FPGAs). The ACT 2 family presents a two-module architecture, consisting of C-modules and S-
modules. These modules are optimized for both combinatorial and sequential designs. Based on Actel’s
patented channeled array architecture, the ACT 2 family provides significant enhancements to gate
density and performance while maintaining downward compatibility with the ACT 1 design environment
and upward compatibility with the ACT 3 design environment. The devices are implemented in silicon
gate, 1.0-μm, two-level metal CMOS, and employ Actel’s PLICE antifuse technology. This revolutionary
architecture offers gate array design flexibility, high performance, and fast time-to-production with user
programming. The ACT 2 family is supported by the Designer and Designer Advantage Systems, which
offers automatic pin assignment, validation of electrical and design rules, automatic placement and
routing, timing analysis, user programming, and diagnostic probe capabilities. The systems are
supported on the following platforms: 386/486 PC, Sun, and HP workstations. The systems
provide CAE interfaces to the following design environments: Cadence, Viewlogic,
Mentor Graphics,
and OrCAD.
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