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參數(shù)資料
| 型號： | A1240A-1PL84I |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 47/54頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA 4K GATES 84-PLCC IND |
| 標準包裝： | 16 |
| 系列： | ACT™ 2 |
| LAB/CLB數(shù)： | 684 |
| 輸入/輸出數(shù)： | 72 |
| 門數(shù)： | 4000 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 84-LCC（J 形引線） |
| 供應商設備封裝： | 84-PLCC（29.31x29.31） |
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R e visio n 8
4 -1
4 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each version of the datasheet.
Revision
Changes
Page
Revision 8
(January 2012)
The ACT 2 datasheet was formatted newly in the style used for current datasheets.
The same information is present (other than noted in the list of changes for this
revision) but divided into chapters.
N/A
Package names used in Table 1 ACT 2 Product Family Profile and throughout the
document were revised to match standards given in Package Mechanical Drawings
(SAR 27395).
The description for SDO pins had earlier been removed from the datasheet and has
now been included again, in the "Pin Descriptions" section (SAR 35819).
SDO pin numbers had earlier been removed from package pin assignment tables in
the datasheet, and have now been restored to the pin tables (SAR 35819).
Revision 7
(June 2006)
The "Ordering Information" section was revised to include RoHS information.
Revision 6
(December 2000)
In the "PG176" package, pin A3 was incorrectly assigned as CLKA, I/O. A3 is a user
I/O. Pin A9 is CLKA, I/O.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A1240A-1PLG160B | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:ACT 2 Family FPGAs |
| A1240A-1PLG160C | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:ACT 2 Family FPGAs |
| A1240A-1PLG160I | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:ACT 2 Family FPGAs |
| A1240A-1PLG160M | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:ACT 2 Family FPGAs |
| A1240A-1PLG176B | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:ACT 2 Family FPGAs |
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