參數(shù)資料
型號： A1415A-VQ100I
廠商： Microsemi SoC
文件頁數(shù)： 67/90頁
文件大?。?/td> 0K
描述： IC FPGA 1500 GATES 100-VQFP
標(biāo)準(zhǔn)包裝： 90
系列： ACT™ 3
LAB/CLB數(shù)： 200
輸入/輸出數(shù)： 80
門數(shù)： 1500
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-TQFP
供應(yīng)商設(shè)備封裝： 100-VQFP（14x14）
R e visio n 3
1 -1
1 – ACT 3 Family Overview
General Description
Microsemi’s ACT 3 Accelerator Series of FPGAs offers the industry’s fastest high-capacity
programmable logic device. ACT 3 FPGAs offer a high performance, PCI compliant programmable
solution capable of 186 MHz on-chip performance and 9.0 nanosecond clock-to-output (–1 speed grade),
with capacities spanning from 1,500 to 10,000 gate array equivalent gates.
The ACT 3 family builds on the proven two-module architecture consisting of combinatorial and
sequential logic modules used in Microsemi’s 3200DX and 1200XL families. In addition, the ACT 3 I/O
modules contain registers which deliver 9.0 nanosecond clock-to-out times (–1 speed grade). The
devices contain four clock distribution networks, including dedicated array and I/O clocks, supporting
very fast synchronous and asynchronous designs. In addition, routed clocks can be used to drive high
fanout signals such as flip-flop resets and output.
The ACT 3 family is supported by Microsemi’s Designer Series Development System which offers
automatic placement and routing (with automatic or fixed pin assignments), static timing analysis, user
programming, and debug and diagnostic probe capabilities.
System Performance Model
Figure 1-1
Predictable Performance (worst-case commercial, –1 speed grade)
Accumulators (16-Bit)
Loadable Counters (16-Bit)
Prescaled Loadable Counters (16-Bit)
Shift Registers
186 MHz
82 MHz
47 MHz
186 MHz
Chip #2 I/O Module
Chip #1 I/O Module
35 pF
I/O CLK
t
CKHS
t
TRACE
t
INSU
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