參數資料
型號: A1425A-1PQG100I
廠商: Microsemi SoC
文件頁數: 6/90頁
文件大?。?/td> 0K
描述: IC FPGA 2500 GATES 100-PQFP
產品變化通告: A1425A Family Discontinuation 23/Jan/2012
標準包裝: 66
系列: ACT™ 3
LAB/CLB數: 310
輸入/輸出數: 80
門數: 2500
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-BQFP
供應商設備封裝: 100-PQFP(14x20)
Detailed Specifications
2- 6
R e v ision 3
Horizontal Routing
Horizontal channels are located between the rows of modules and are composed of several routing
tracks. The horizontal routing tracks within the channel are divided into one or more segments. The
minimum horizontal segment length is the width of a module-pair, and the maximum horizontal segment
length is the full length of the channel. Any segment that spans more than one-third the row length is
considered a long horizontal segment. A typical channel is shown in Figure 2-7. Undedicated horizontal
routing tracks are used to route signal nets. Dedicated routing tracks are used for the global clock
networks and for power and ground tie-off tracks.
Vertical Routing
Other tracks run vertically through the modules. Vertical tracks are of three types: input, output, and long.
Vertical tracks are also divided into one or more segments. Each segment in an input track is dedicated
to the input of a particular module. Each segment in an output track is dedicated to the output of a
particular module. Long segments are uncommitted and can be assigned during routing. Each output
segment spans four channels (two above and two below), except near the top and bottom of the array
where edge effects occur. LVTs contain either one or two segments. An example of vertical routing tracks
and segments is shown in Figure 2-8.
Figure 2-7
Horizontal Routing Tracks and Segments
Figure 2-8
Vertical Routing Tracks and Segments
HF
Module Row
HCLK
CLK0
NVCC
SIGNAL
(LHT)
SIGNAL
NVSS
CLK1
Track
Segment
|
Module Row
Vertical Input
Segment
S-Module
C-Module
VF
FF
XF
Module Row
Channel
LVTs
S-Module
C-Module
相關PDF資料
PDF描述
A1425A-1PQ100I IC FPGA 2500 GATES 100-PQFP
A1425A-PQ100C IC FPGA 2500 GATES 100-PQFP
ASC50DRYH-S734 CONN EDGECARD 100PS DIP .100 SLD
XC4005XL-3PQ160C IC FPGA C-TEMP 3.3V 3SPD 160PQFP
XC4005XL-3PQ100I IC FPGA I-TEMP 3.3V 3SPD 100PQFP
相關代理商/技術參數
參數描述
A1425A-1PQG160C 功能描述:IC FPGA 2500 GATES 160-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ACT™ 3 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數:100 邏輯元件/單元數:238 RAM 位總計:3200 輸入/輸出數:80 門數:3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA(34.55x34.55)
A1425A-1PQG160I 功能描述:IC FPGA 2500 GATES 160-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ACT™ 3 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數:100 邏輯元件/單元數:238 RAM 位總計:3200 輸入/輸出數:80 門數:3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA(34.55x34.55)
A1425A-1VQ100C 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ACT™ 3 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數:100 邏輯元件/單元數:238 RAM 位總計:3200 輸入/輸出數:80 門數:3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA(34.55x34.55)
A1425A-1VQ100I 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ACT™ 3 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數:100 邏輯元件/單元數:238 RAM 位總計:3200 輸入/輸出數:80 門數:3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA(34.55x34.55)
A1425A-1VQG100C 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:ACT™ 3 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數:100 邏輯元件/單元數:238 RAM 位總計:3200 輸入/輸出數:80 門數:3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA(34.55x34.55)