參數(shù)資料
型號(hào): A1425A-2VQG100I
元件分類: FPGA
英文描述: FPGA, 310 CLBS, 2500 GATES, PQFP100
封裝: 1 MM HEIGHT, VQFP-100
文件頁(yè)數(shù): 17/68頁(yè)
文件大小: 489K
代理商: A1425A-2VQG100I
1-198
Timing Derating Factor (Temperature and Voltage)
Timing Derating Factor for Designs at Typical Temperature (T J = 25°C)
and Voltage (5.0 V)
Temperature and Voltage Derating Factors
(normalized to Worst-Case Commercial, T J = 4.75 V, 70°C)
Note:
This derating factor applies to all routing and propagation dealys.
Industrial
Military
Min.
Max.
Min.
Max.
(Commercial Minimum/Maximum Specication) x
0.66
1.07
0.63
1.17
(Commercial Maximum Specication) x
0.85
–55
–40
0
25
70
85
125
4.50
0.72
0.76
0.85
0.90
1.04
1.07
1.17
4.75
0.70
0.73
0.82
0.87
1.00
1.03
1.12
5.00
0.68
0.71
0.79
0.84
0.97
1.00
1.09
5.25
0.66
0.69
0.77
0.82
0.94
0.97
1.06
5.50
0.63
0.66
0.74
0.79
0.90
0.93
1.01
Junction Temperature and Voltage Derating Curves
(normalized to Worst-Case Commercial, TJ = 4.75 V, 70°C)
Voltage (V)
D
e
ra
ti
n
g
F
a
c
to
r
0.60
0.70
0.80
0.90
1.00
1.10
1.20
4.50
4.75
5.00
5.25
5.50
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