參數(shù)資料
型號(hào): A1425LK
廠商: Allegro Microsystems Inc
文件頁數(shù): 10/13頁
文件大?。?/td> 404K
描述: IC SENSOR HALL EFFECT AC 4-SIP
標(biāo)準(zhǔn)包裝: 500
傳感范圍: 11G 跳閘,-11G 釋放
類型: 專用型
電源電壓: 4 V ~ 26.5 V
電流 - 電源: 7mA
電流 - 輸出(最大): 25mA
輸出類型: 數(shù)字,開路集電極
特點(diǎn): 高精度
工作溫度: -40°C ~ 150°C
封裝/外殼: 4-SIP
供應(yīng)商設(shè)備封裝: 4-SIP
包裝: 散裝
High Accuracy Analog Speed Sensor IC with Integrated
Filter Capacitor and Dual Zero-Crossing Output Signal
A1425
10
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
The A1425 is a versatile high-precision differential Hall-effect
device that can be used in a wide range of applications. Proper
choice of the target material and shape, and assembly techniques
enables large working air gaps and high switchpoint accuracy
over the device operating temperature range.
Device Operation
The A1425 sensor IC contains two integrated Hall transducers
that are used to differentially respond to a magnetic  eld across
the surface of the IC. Referring to  gure 1, the trigger switches
the output off (output high) when the differential magnetic  eld
crosses zero while increasing in strength (referred to as the posi-
tive direction), and switches the output on (output low) when
the differential magnetic  eld crosses zero while decreasing (the
negative direction).
The operation is achieved through the use of two separate com-
parators. Both comparators use the same reference point, 0 G, to
provide high accuracy, but one comparator has a positive hyster-
esis, B
HYS1
, and the other a negative hysteresis, B
HYS2
. Therefore,
one comparator switches (B
OP
) at the zero crossing on an increas-
ing differential signal and the other switches (B
RP
) at the zero
crossing on a decreasing differential signal. The hysteresis on
each comparator precludes false switching on noise or target jitter.
Start-up
During power-on time, t
PO
, the output signal, V
OUT
, is high.
Beyond this time, if the applied magnetic  eld, B
diff
, is absent or
less than 50 G peak-to-peak, the switching state and V
OUT
 polar-
ity are indeterminate. V
OUT
 will be valid for B
diff
 > 50 Gp-p, after
the additional settling time, t
Settle
, has also elapsed. Also during
t
PO
, a circuit in the A1425 is brie y enabled that charges the on-
chip capacitor. This feature reduces t
PO
, relative to the long RC
time constant of a high-pass  lter.
Delay
The on-chip band-pass  lter induces delay in the output signal,
V
OUT
, relative to the applied magnetic  eld, B
diff
. Simulation data
shown in the Characteristic Data section quantify the effect of the
input signal amplitude on the phase shift of the output.
AC-Coupled Operation
Steady-state magnet and system offsets are eliminated using an
on-chip differential band-pass  lter. The low and high frequency
poles of this band-pass  lter are set using internal integrated
capacitors and resistors. The differential structure of this  lter
improves the ability of the IC to reject single-ended noise on
the ground (GND pin) or supply line (VCC pin) and, as a result,
makes it more resistant to electromagnetic interference typically
seen in hostile remote-sensing environments.
Functional Description
Figure 1. Typical output characteristics with dual comparator operation. Characteristics shown without delay, see Characteristic
Data section charts for delay and phase shift contributions.
11.0
0.0
11.0
On
Off
Off
B
RP(typ)
B
OP(typ)
B
OP(min)
/ B
RP(min)
B
OP(max)
/ B
RP(max)
Output Signal, V
OUT
Switching State
Applied Magnetic
Field, B
diff
Comparator 1
Comparator 2
t+
B
HYS2
A
B
HYS1
A
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