參數(shù)資料
型號: A1440A-1PLG84I
廠商: Microsemi SoC
文件頁數(shù): 2/90頁
文件大小: 0K
描述: IC FPGA 4K GATES 84-PLCC
產(chǎn)品變化通告: A1440A Family Discontinuation 24/Jan/2012
標準包裝: 16
系列: ACT™ 3
LAB/CLB數(shù): 564
輸入/輸出數(shù): 70
門數(shù): 4000
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 84-LCC(J 形引線)
供應商設(shè)備封裝: 84-PLCC(29.31x29.31)
Detailed Specifications
2- 2
R e v ision 3
Logic Modules
ACT 3 logic modules are enhanced versions of the 1200XL family logic modules. As in the 1200XL
family, there are two types of modules: C-modules and S-modules (Figure 2-2 and Figure 2-3). The C-
module is functionally equivalent to the 1200XL C-module and implements high fanin combinatorial
macros, such as 5-input AND, 5-input OR, and so on. It is available for use as the CM8 hard macro. The
S-module is designed to implement high-speed sequential functions within a single module.
S-modules consist of a full C-module driving a flip-flop, which allows an additional level of logic to be
implemented without additional propagation delay. It is available for use as the DFM8A/B and DLM8A/B
hard macros. C-modules and S-modules are arranged in pairs called module-pairs. Module-pairs are
arranged in alternating patterns and make up the bulk of the array. This arrangement allows the
placement software to support two-module macros of four types (CC, CS, SC, and SS). The C-module
implements the following function:
Y = !S1 * !S0 * D00 + !S1 * S0 * D01 + S1 * !S0 * D10 + S1 * S0 * D11
EQ 1
where: S0 = A0 * B0 and S1 = A1 + B1
Figure 2-2
C-Module Diagram
Figure 2-3
S-Module Diagram
D11
D01
D00
D10
A1 B1
A0 B0
Y
OUT
S1
S0
CLR
CLK
D11
D01
D00
D10
A1 B1
A0 B0
Y
Q
D
OUT
S0
S1
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