參數(shù)資料
型號(hào): A1460A-CQ196C
廠商: Microsemi SoC
文件頁數(shù): 86/90頁
文件大?。?/td> 0K
描述: IC FPGA 6K GATES 196-CQFP
標(biāo)準(zhǔn)包裝: 1
系列: ACT™ 3
LAB/CLB數(shù): 848
輸入/輸出數(shù): 168
門數(shù): 6000
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 196-BCQFP,帶拉桿
供應(yīng)商設(shè)備封裝: 196-CQFP(63.5x63.5)
R e visio n 3
4 -1
4 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each version of the datasheet.
Revision
Changes
Page
Revision 3
(January 2012)
The description for SDO pins had earlier been removed from the datasheet and has
now been included again, in the "Pin Descriptions" section (SAR 35820).
SDO pin numbers had earlier been removed from package pin assignment tables in
the datasheet, and have now been restored to the pin tables (SAR 35820).
Revision 2
(September 2011)
The ACT 3 datasheet was formatted newly in the style used for current datasheets.
The same information is present (other than noted in the list of changes for this
revision) but divided into chapters.
N/A
The datasheet was revised to note in multiple places that speed grades –2 and –3
have been discontinued. The following device/package combinations have been
discontinued for all speed grades and temperatures (SAR 33872):
A1415 PG100
A1425 PG133
A1440 PG175
A1460 BG225
I and
others
The "Features" section was revised to state the clock-to-ouput time and on-chip
performance for –1 speed grade as 9.0 ns and 186 MHz. The "General Description"
section was revised in accordance (SAR 33872).
The maximum performance values were updated in Table 1 ACT 3 Family Product
Information, and now reflect worst-case commercial for the –1 speed grade (SAR
33872).
The "Product Plan" table was updated as follows to conform to current offerings (SAR
33872):
The A1415A device is offered in PL84, PG100, and VQ100 packages for Military
application.
The A1440A device is offered in TQ176 and VQ100 packages for Industrial
application.
include data for all speed grades instead of only –3 (SAR 33872).
revised to reflect values for the –1 speed grade (SAR 33872).
Figure 2-10 Timing Model was updated to show data for the –1 speed grade instead
of –3 (SAR 33872).
Conditions was updated to include data for all speed grades instead of only –3 (SAR
33872).
Package names used in the "Package Pin Assignments" section and throughout the
document were revised to match standards given in Package Mechanical Drawings
(SAR 27395).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A1460A-CQ196M 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 Family 6K Gates 848 Cells 100MHz 0.8um Technology 5V 196-Pin CQFP 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 6K GATES 848 CELLS 100MHZ 0.8UM 5V 196CQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 6K GATES 196-CQFP MIL
A1460A-PG207B 功能描述:IC FPGA 6K GATES 207-CPGA MIL RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:ACT™ 3 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)
A1460A-PG207C 功能描述:IC FPGA 6K GATES 207-CPGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:ACT™ 3 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)
A1460A-PG207M 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 6K GATES 848 CELLS 100MHZ 0.8UM 5V 207CPGA - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 6K GATES 207-CPGA MIL
A1460A-PQ160C 功能描述:IC FPGA 6K GATES 160-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:ACT™ 3 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)