參數(shù)資料
型號: A3425LL-T
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: LEAD FREE, PLASTIC, MS-012AA, SOIC-8
文件頁數(shù): 13/21頁
文件大?。?/td> 484K
代理商: A3425LL-T
Ultra-Sensitive Dual-Channel Quadrature
Hall-Effect Bipolar Switch
A3425
20
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4.90
REF
.193
0.65
MAX
.026
0.25
0.10
.010
.004
1.75
1.35
.069
.053
0.51
0.31
.020
.012
4.00
3.80
.157
.150
0.25
0.17
.010
.007
8
0
1.27
0.40
.050
.016
5.00
4.80
.197
.189
C
SEATING
PLANE
A
B
8X
0.25 [.010] M C
A
B
6.20
5.80
.244
.228
C
0.10 [.004]
8X
0.25 [.010] M B M
1.27 .050
0.25 .010
1.27
REF
.050
2.50
REF
.098
2
1
8
GAUGE PLANE
SEATING PLANE
Preliminary dimensions, for reference only
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
(reference JEDEC MS-012 AA)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
A
B
Reference pad layout (reference IPC SOIC127P600-8M);
adjust as necessary to meet application process requirements
Hall elements E1, E2 (not to scale), U.S. Customary
dimensions controlling
1.40
NOM
.055
1.96
NOM
.077
1.96
NOM
.077
D
C
D
1.00
NOM
.039
D
Active Area Depth 0.40 [0.016]
C
E1
E2
Package L, 8-pin SOIC
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