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參數(shù)資料
| 型號： | A3P1000-1FGG144IFG144 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1000000 GATES, PBGA144 |
| 封裝： | 1 MM PITCH, GREEN, FBGA-144 |
| 文件頁數(shù)： | 536/608頁 |
| 文件大小： | 20486K |
| 代理商： | A3P1000-1FGG144IFG144 |
UJTAG Applications in Actel’s Low-Power Flash Devices
v1.1
19- 9
FlashROM Read-Back Using JTAG
The low-power flash architecture contains a dedicated nonvolatile FlashROM block, which is
formatted into eight 128-bit pages. For more information on FlashROM, refer to FlashROM in
Actel’s Low-Power Flash Devices. The contents of FlashROM are available to the VersaTiles during
normal operation through a read operation. As a result, the UJTAG macro can be used to provide
the FlashROM contents to the JTAG port during normal operation. Figure 19-7 illustrates a simple
block diagram of using UJTAG to read the contents of FlashROM during normal operation.
The FlashROM read address can be provided from outside the FPGA through the TDI input or can
be generated internally using the core logic. In either case, data serialization logic is required
(Figure 19-7) and should be designed using the VersaTile core logic. FlashROM contents are read
asynchronously in parallel from the flash memory and shifted out in a synchronous serial format to
TDO. Shifting the serial data out of the serialization block should be performed while the TAP is in
UDRSH mode. The coordination between TCK and the data shift procedure can be done using the
TAP state machine by monitoring UDRSH, UDRCAP, and UDRUPD.
Conclusion
Actel low-power flash FPGAs offer many unique advantages, such as security, nonvolatility,
reprogrammablity, and low power—all in a single chip. In addition, IGLOO, Fusion, and ProASIC3
devices provide access to the JTAG port from core VersaTiles while the device is in normal operating
mode. A wide range of available user-defined JTAG opcodes allows users to implement various
types of applications, exploiting this feature of these devices. The connection between the JTAG
port and core tiles is implemented through an embedded and hardwired UJTAG tile. A UJTAG tile
can be instantiated in designs using the UJTAG library cell. This document presents multiple
examples of UJTAG applications, such as dynamic reconfiguration, silicon test and debug, fine-
tuning of the design, and RAM initialization. Each of these applications offers many useful
advantages.
Figure 19-7 Block Diagram of Using UJTAG to Read FlashROM Contents
FROM
Addr [6:0]
Data[7:0]
CLK
Enable
SDO
SDI
RESET
Addr[6:0]
Data[7:0]
TDI
TCK
TDO
TMS
TRST
UTDI
UTDO
UDRCK
UDRCAP
UDRSH
UDRUPD
URSTB
UIREG[7:0]
Control
UJTAG
Address Generation and
Data Serlialization
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A3P1000-1FGG144M | 制造商:Microsemi Corporation 功能描述:FPGA ProASIC?3 Family 1M Gates 130nm Technology 1.5V 144-Pin FBGA 制造商:Microsemi Corporation 功能描述:FPGA PROASIC3 FAMILY 1M GATES 130NM (CMOS) TECHNOLOGY 1.5V 1 - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 97 I/O 144FBGA |
| A3P1000-1FGG144PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3 Flash Family FPGAs |
| A3P1000-1FGG144T | 功能描述:IC FPGA 1KB FLASH 1M 144-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| A3P1000-1FGG256 | 功能描述:IC FPGA 1KB FLASH 1M 256-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A3P1000-1FGG256I | 功能描述:IC FPGA 1KB FLASH 1M 256-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
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