Revision 13 2-9 Power Calculation Methodology This section describes a simplified method to estimate power consumptio" /> 
<form id="w2353"><tr id="w2353"><sub id="w2353"></sub></tr></form>
<form id="w2353"></form>
    •         


    
    



    

    
  
    
    
    
    
  
    
  
  

    





    


    
 
 




 
 


    

    
    


    參數(shù)資料
    

    


    


    
型號(hào)：
A3PE3000-FG484

    

    
廠商：
Microsemi SoC

    

    
文件頁數(shù)：
79/162頁

    

    
文件大?。?/td>
0K

    

    
描述：
IC FPGA 1KB FLASH 3M 484-FBGA

    

    
標(biāo)準(zhǔn)包裝：
40

    

    
系列：
ProASIC3E

    

    
RAM 位總計(jì)：
516096
    		

    

    
輸入/輸出數(shù)：
341
    		

    

    
門數(shù)：
3000000
    		

    

    
電源電壓：
1.425 V ~ 1.575 V
    		

    

    
安裝類型：
表面貼裝
    		

    

    
工作溫度：
0°C ~ 70°C
    		

    

    
封裝/外殼：
484-BGA
    		

    

    
供應(yīng)商設(shè)備封裝：
484-FPBGA（23x23）
    		

    

    

    

	
    
    
    

    
    
	
    ProASIC3E Flash Family FPGAs
    Revision 13
    2-9
    Power Calculation Methodology
    This section describes a simplified method to estimate power consumption of an application. For more
    accurate and detailed power estimations, use the SmartPower tool in the Libero SoC software.
    The power calculation methodology described below uses the following variables:
    The number of PLLs as well as the number and the frequency of each output clock generated
    The number of combinatorial and sequential cells used in the design
    The internal clock frequencies
    The number and the standard of I/O pins used in the design
    The number of RAM blocks used in the design
    Toggle rates of I/O pins as well as VersaTiles—guidelines are provided in Table 2-11 on
    Enable rates of output buffers—guidelines are provided for typical applications in Table 2-12 on
    Read rate and write rate to the memory—guidelines are provided for typical applications in
    Table 2-12 on page 2-11. The calculation should be repeated for each clock domain defined in the
    design.
    Methodology
    Total Power Consumption—PTOTAL
    PTOTAL = PSTAT + PDYN
    PSTAT is the total static power consumption.
    PDYN is the total dynamic power consumption.
    Total Static Power Consumption—PSTAT
    PSTAT = PDC1 + NINPUTS * PDC2 + NOUTPUTS * PDC3
    NINPUTS is the number of I/O input buffers used in the design.
    NOUTPUTS is the number of I/O output buffers used in the design.
    Total Dynamic Power Consumption—PDYN
    PDYN = PCLOCK + PS-CELL + PC-CELL + PNET + PINPUTS + POUTPUTS + PMEMORY + PPLL
    Global Clock Contribution—PCLOCK
    PCLOCK = (PAC1 + NSPINE * PAC2 + NROW * PAC3 + NS-CELL * PAC4) * FCLK
    NSPINE is the number of global spines used in the user design—guidelines are provided in the
    "Spine Architecture" section of the Global Resources chapter in the ProASIC3E FPGA Fabric
    .
    NROW is the number of VersaTile rows used in the design—guidelines are provided in the
    "Spine Architecture" section of the Global Resources chapter in the ProASIC3E FPGA Fabric
    .
    FCLK is the global clock signal frequency.
    NS-CELL is the number of VersaTiles used as sequential modules in the design.
    PAC1, PAC2, PAC3, and PAC4 are device-dependent.
    Sequential Cells Contribution—PS-CELL
    PS-CELL = NS-CELL * (PAC5 + 1 / 2 * PAC6) * FCLK
    NS-CELL is the number of VersaTiles used as sequential modules in the design. When a
    multi-tile sequential cell is used, it should be accounted for as 1.
    1 is the toggle rate of VersaTile outputs—guidelines are provided in Table 2-11 on
    .
    FCLK is the global clock signal frequency.
    
    
    
    
    
    


    


    

    相關(guān)PDF資料
    		

    PDF描述
    		

    
    

    
M1A3PE3000-FGG484
IC FPGA 1KB FLASH 3M 484-FBGA

    

    
ABC49DREI-S734
CONN EDGECARD 98POS .100 EYELET

    

    
EP4CGX110CF23I7
IC CYCLONE IV FPGA 110K 484FBGA

    

    
EPF10K100EQC240-2N
IC FLEX 10KE FPGA 100K 240-PQFP

    

    
EPF10K100EQC240-2
IC FLEX 10KE FPGA 100K 240-PQFP

    

    

    

    


    


    

    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
A3PE3000-FG484I
功能描述:IC FPGA 1KB FLASH 3M 484-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:ProASIC3E 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75）

    

    
A3PE3000-FG896
功能描述:IC FPGA 1KB FLASH 3M 896-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:ProASIC3E 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs
	Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）

    

    
A3PE3000-FG896ES
 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs

    

    
A3PE3000-FG896I
功能描述:IC FPGA 1KB FLASH 3M 896-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:ProASIC3E 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75）

    

    
A3PE3000-FG896PP
 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs

    

    
    
    
    
	
    	
    
    
     
     
    發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。
    
 
     
    

   	  
    
     

    
                    			    				      
    
                
    
                  
    
                    
                    
    
                      
    
                      
                      
    采購需求
      (若只采購一條型號(hào)，填寫一行即可)
    
                      
                      
    發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)
    
                      
                      
    發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)
    
                       
                        
    
                                
                                
    
                                    *型號(hào)
                                    *數(shù)量
                                    廠商
                                    批號(hào)
                                    封裝
                                  
    
                                    
                                
                                
    
                                    
                                        
    
                                            
                                            
                                        
    
                                        		
                                     
                                    
                                        
    
                                        		
                                    
                                        
    
                                        		
                                    
                                        
    
                                        		
                                    
                                        
    
                                        		
                                  
    
                                  
                                   
                                    
                            
    
                             
                             
							                            
    
                          添加更多采購
    
                      
    
                      
                      
    
                      
                      
    我的聯(lián)系方式
    
                     
                     
                       
    
                                
                                
                                
    
                                    
                                         *
                                    
                                    
                                  
    
                                  
                                  
    
                                    
                                         *
                                    
                                    
                                  
    
                                  
                                  
    
                                    
                                        
                                    
                                    
                                  
    
                                  
                                  
    
                                    
                                         *