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| 型號(hào)： | A40MX04-PL68M |
| 元件分類(lèi)： | FPGA |
| 英文描述： | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁(yè)數(shù)： | 92/124頁(yè) |
| 文件大?。?/td> | 3142K |
| 代理商： | A40MX04-PL68M |
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40MX and 42MX FPGA Families
v6.1
1-1
40MX and 42MX FPGA Families
General Description
Actel's 40MX and 42MX families offer a cost-effective
design solution at 5V. The MX devices are single-chip
solutions
and
provide
high
performance
while
shortening the system design and development cycle.
MX
devices
can
integrate
and
consolidate
logic
implemented in multiple PALs, CPLDs, and FPGAs.
Example applications include high-speed controllers and
address decoding, peripheral bus interfaces, DSP, and co-
processor functions.
The MX device architecture is based on Actel’s patented
antifuse technology implemented in a 0.45m triple-
metal CMOS process. With capacities ranging from 3,000
to 54,000 system gates, the MX devices provide
performance up to 250 MHz, are live on power-up and
have one-fifth the standby power consumption of
comparable FPGAs. Actel’s MX FPGAs provide up to 202
user I/Os and are available in a wide variety of packages
and speed grades.
Actel’s A42MX24 and A42MX36 devices also feature
MultiPlex I/Os, which support mixed-voltage systems,
enable programmable PCI, deliver high-performance
operation at both 5.0V and 3.3V, and provide a low-
power mode. The devices are fully compliant with the
PCI Local Bus Specification (version 2.1). They deliver
200 MHz on-chip operation and 6.1 ns clock-to-output
performance.
The 42MX24 and 42MX36 devices include system-level
features such as IEEE Standard 1149.1 (JTAG) Boundary
Scan Testing and fast wide-decode modules. In addition,
the
A42MX36
device
offers
dual-port
SRAM
for
implementing fast FIFOs, LIFOs, and temporary data
storage. The storage elements can efficiently address
applications requiring wide datapath manipulation and
can perform transformation functions such as those
required for telecommunications, networking, and DSP.
All MX devices are fully tested over automotive and
military temperature ranges. In addition, the largest
member of the family, the A42MX36, is available in both
CQ208 and CQ256 ceramic packages screened to MIL-
STD-883 levels. For easy prototyping and conversion from
plastic to ceramic, the CQ208 and PQ208 devices are pin-
compatible.
MX Architectural Overview
The MX devices are composed of fine-grained building
blocks that enable fast, efficient logic designs. All devices
within these families are composed of logic modules, I/O
modules, routing resources and clock networks, which
are the building blocks for fast logic designs. In addition,
the A42MX36 device contains embedded dual-port
SRAM modules, which are optimized for high-speed
datapath functions such as FIFOs, LIFOs and scratchpad
memory. A42MX24 and A42MX36 also contain wide-
decode modules.
Logic Modules
The 40MX logic module is an eight-input, one-output
logic circuit designed to implement a wide range of logic
functions with efficient use of interconnect routing
resources (Figure 1-1).
The logic module can implement the four basic logic
functions (NAND, AND, OR and NOR) in gates of two,
three, or four inputs. The logic module can also
implement a variety of D-latches, exclusivity functions,
AND-ORs and OR-ANDs. No dedicated hard-wired latches
or flip-flops are required in the array; latches and flip-
flops can be constructed from logic modules whenever
required in the application.
Figure 1-1 40MX Logic Module
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A40MX04-PL68X79 | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQCC68 |
| A40MX04-PL68 | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQCC68 |
| A40MX04-PL84AX79 | FPGA, 547 CLBS, 6000 GATES, 116 MHz, PQCC84 |
| A40MX04-PL84A | FPGA, 547 CLBS, 6000 GATES, 116 MHz, PQCC84 |
| A40MX04-PL84IX79 | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQCC84 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A40MX04-PL68X4 | 制造商:Microsemi Corporation 功能描述:MX SERIES 6000 GATES FPGA |
| A40MX04-PL84 | 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A40MX04-PL84A | 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A40MX04-PL84I | 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A40MX04-PL84M | 制造商:Microsemi Corporation 功能描述:FPGA 6K GATES 547 CELLS 83MHZ/139MHZ 0.45UM 3.3V/5V 84PLCC - Rail/Tube 制造商:Microsemi Corporation 功能描述:IC FPGA 69 I/O 84PLCC 制造商:Microsemi Corporation 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC |
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