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參數(shù)資料
| 型號(hào)： | A40MX04-PQ100IX79 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 26/124頁 |
| 文件大?。?/td> | 3142K |
| 代理商： | A40MX04-PQ100IX79 |
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FPGA Families 40MX and 42MX
v6.1
3-1
Datasheet Information
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous version
Changes in current version (v 6. 1 )
Page
v6.0
(January 2004)
to -0.5 to VCCA+0.5.
min in industrial and military. VIH had VCCI and that was changed to VCCA.
v5.1
The "Ease of Integration" section was updated.
The "Temperature Grade Offerings" section is new.
The "Speed Grade Offerings" section is new.
The "General Description" section was updated.
The "MultiPlex I/O Modules" section was updated.
The "User Security" section was updated.
Table 1 Voltage Support of MX Devices was updated.
The "Power Dissipation" section was updated.
The "Static Power Component" section was updated.
The "Equivalent Capacitance" section was updated.
Figure 1-13 Silicon Explorer II Setup with 42MX was updated.
Table 4 Supported BST Public Instructions was updated.
Figure 1-14 42MX IEEE 1149.1 Boundary Scan Circuitry was updated.
The "Development Tool Support" section was updated.
Maximum Ratings for 40MX Devices* were updated.
The Table 9 5V TTL Electrical Specifications was updated.
The Table 13 3.3V LVTTL Electrical Specifications was updated.
Electrical Specificationswere updated.
The Table 17 DC Specification (5.0V PCI Signaling)1 was updated.
The Table 19 DC Specification (3.3V PCI Signaling)1 was updated.
tables were updated.
Figure 1-17 40MX Timing Model* was updated.
The Figure 1-20 42MX Timing Model (SRAM Functions) was updated.
The Figure 1-27 Output Buffer Latches was updated.
The "Pin Descriptions" section was updated.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A40MX04-PQ100I | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQFP100 |
| A40MX04-PQ100MX79 | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQFP100 |
| A40MX04-PQ100M | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQFP100 |
| A40MX04-PQ100X79 | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQFP100 |
| A40MX04-PQ100 | FPGA, 547 CLBS, 6000 GATES, 80 MHz, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A40MX04-PQ100M | 制造商:Microsemi Corporation 功能描述:FPGA 40MX Family 6K Gates 547 Cells 83MHz/139MHz 0.45um Technology 3.3V/5V 100-Pin PQFP 制造商:Microsemi Corporation 功能描述:FPGA 6K GATES 547 CELLS 83MHZ/139MHZ 0.45UM 3.3V/5V 100PQFP - Trays 制造商:Microsemi SOC Products Group 功能描述:83MHZ/139MHZ 0.45UM TECHNOLOGY 3.3V/5V 制造商:Microsemi Corporation 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP |
| A40MX04-PQ208A | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX Automotive FPGA Families |
| A40MX04PQG100 | 制造商:Microsemi SOC Products Group 功能描述: |
| A40MX04-PQG100 | 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A40MX04-PQG100A | 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
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