參數(shù)資料
型號: A42MX09-1VQ100B
廠商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 4/20頁
文件大小: 854K
代理商: A42MX09-1VQ100B
12
3392E–CNFG–08/07
AT17F16
Notes:
1. Preliminary specifications for military operating range only.
2. AC test lead = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ±200 mV from steady-state active levels.
4. See the AT17F Programming Specfication for procedural information.
16. AC Characteristics
Symbol
Description
AT17F16
Units
Min
Typ
Max
T
OE
OE to Data Delay
Commercial
50
ns
Industrial(1)
55
ns
T
CE to Data Delay
Commercial
55
ns
Industrial(1)
60
ns
TCAC
CLK to Data Delay
Commercial
3
30
ns
Industrial(1)
30
ns
TOH
Data Hold from CE, OE, or CLK
Commercial
0
ns
Industrial(1)
0ns
T
DF
CE or OE to Data Float Delay
Commercial
15
ns
Industrial(1)
15
ns
TLC
CLK Low Time
Commercial
15
ns
Industrial(1)
15
ns
THC
CLK High Time
Commercial
15
ns
Industrial(1)
15
ns
T
SCE
CE Setup Time to CLK
(to guarantee proper counting)
Commercial
20
ns
Industrial(1)
25
ns
T
HCE
CE Hold Time from CLK
(to guarantee proper counting)
Commercial
0
ns
Industrial(1)
0ns
THOE
RESET/OE Low Time
(guarantees counter is reset)
Commercial
20
ns
Industrial(1)
20
ns
F
MAX
Maximum Input Clock Frequency
SEREN = 0
Commercial
10
MHz
Industrial(1)
10
MHz
F
MAX
Maximum Input Clock Frequency
SEREN = 1
Commercial
33
MHz
Industrial(1)
33
MHz
TWR
Write Cycle Time(4)
Commercial
12
s
Industrial(1)
12
s
T
EC
Erase Cycle Time(4)
Commercial
25
s
Industrial(1)
25
s
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