參數(shù)資料
型號: A42MX09-2PQG160
廠商: Microsemi SoC
文件頁數(shù): 68/142頁
文件大?。?/td> 0K
描述: IC FPGA MX SGL CHIP 14K 160-PQFP
標(biāo)準(zhǔn)包裝: 24
系列: MX
輸入/輸出數(shù): 101
門數(shù): 14000
電源電壓: 3 V ~ 3.6 V,4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 160-BQFP
供應(yīng)商設(shè)備封裝: 160-PQFP(28x28)
40MX and 42MX FPGA Families
Re vi s i on 11
1 - 27
Timing Models
Note:
Values are shown for 40MX –3 speed devices at 5.0 V worst-case commercial conditions.
Figure 1-16 40MX Timing Model*
Notes:
1. Input module predicted routing delay
2. Values are shown for A42MX09 –3 at 5.0 V worst-case commercial conditions.
Figure 1-17 42MX Timing Model
Output Delay
Input Delay
Logic Module
Internal Delays
t
DLH = 3.32 ns
t
ENHZ = 7.92 ns
t
RD1 = 1.28 ns
t
RD2 = 1.80 ns
t
RD4 = 2.33 ns
t
RD8 = 4.93 ns
I/O Module
t
PD = 1.24 ns
t
CO = 1.24 ns
t
IRD1 = 2.09 ns
t
IRD4 = 3.64 ns
t
IRD8 = 5.73 ns
t
INYL = 0.62 ns
t
IRD2 = 2.59 ns
I/O Module
F
MAX = 180 MHz
t
CKH = 4.55 ns
FO = 128
Array
Clock
Predicted
Routing
Delays
Array
Clocks
Comb.
Logic
Include
DQ
FO = 32
Output Delays
Internal Delays
Input Delays
I/O Module
DQ
Combinatorial
Logic Module
Sequential
Logic Module
I/O Module
DQ
Predicted
Routing
Delays
G
t
RD1 = 0.7 ns
t
RD2 = 1.9 ns
t
RD4 = 1.4 ns
t
RD8 = 2.3 ns
t
OUTH = 0.00 ns
t
OUTSU = 0.3 ns
t
GLH = 2.6 ns
t
DLH = 2.5 ns
t
DLH = 2.5 ns
t
ENHZ = 4.9 ns
t
RD1 = 0.70 ns
t
LCO = 5.2 ns (light loads, pad-to-pad)
t
CO = 1.3 ns
t
SUD = 0.3 ns
t
HD = 0.00 ns
t
PD=1.2 ns
t
IRD1 = 2.0 ns
1
t
INYL = 0.8 ns
tINH = 0.0 ns
t
INSU = 0.3 ns
t
INGL = 1.3 ns
F
MAX = 296 MHz
t
CKH = 2.70 ns
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參數(shù)描述
A42MX09-2PQG160I 功能描述:IC FPGA MX SGL CHIP 14K 160-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)
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