參數(shù)資料
型號： A42MX16-1PQ100
廠商： Electronic Theatre Controls, Inc.
英文描述： Audio Transformer; Power Rating:100mW; Mounting Type:PCB Surface; Current Rating:4mA; External Depth:0.594"; External Height:0.625"; External Width:0.813"; Frequency Response Max:15kHz; Frequency Response Min:200Hz RoHS Compliant: Yes
中文描述： 40MX和42MX FPGA系列
文件頁數(shù)： 105/120頁
文件大?。?/td> 854K
代理商： A42MX16-1PQ100
85
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
The general I/O port function is overridden by the Timer2 modulator stage in case the selected
timer mode are needed the output pins. However, the pin direction (input or output) is still con-
trolled by the Data Direction Register (DDR) for the port pin. The Data Direction Register bits for
the T2O1 and T2O2 pins (DDD5, DDD6) must be set as output before the value is visible on the
pin. When the modulator has select the SPI mode of the SSI, PD7 pin is configured as an input
regardless of the setting of DDD7 bit. The port override function is generally independent of the
modulator mode, but there are some exceptions. Refer to Table 3-41 on page 94 for details.
If the “ATA6289” is combined with ATA5756/ATA5757 as stacked die the pins PD5/T2O1 and
PD6/T2O2 are internally bonded with the “ASK” - and “FSK” - pins of Atmel
ATA5756/ATA5757
respectively, see Figure 2-2 on page 4. So you can use the SSI of Timer2 modulator stage to
modulate the ATA5756/ATA5757 (ASK - or FSK - modulation).
3.13.5.4
Modulator Toggle Flip-Flop (T2)
The toggle flip-flop (T2) consists of a flip-flop with a preset input signal (T2TOP), an input clock
(CLK
T2) and an output signal (M2). The T2TOP bit at T2MRB register allows the programmer to
initialize the toggle output flip-flop signal (M2), only if the Timer2 is not running (T2E = '0'). The
output signal (M2) was negated with every rising edge of the input clock (CLK
T2). The Figure
3-32 shows Toggle Flip-Flop (T2).
Figure 3-32. Toggle Flip-Flop (T2)
Figure 3-33. Example of Toggle Flip-Flop (T2)
CLKT2
M2
T2TOP
T2
CLKT2
M2
T2E
T2TOP
write access
’1’
’0’
’1’
相關(guān)PDF資料
PDF描述
A42MX24-1PQ100 40MX and 42MX FPGA Families
A42MX02-1PQ100A Audio Transformer; Power Rating:1W; Mounting Type:PCB Surface; External Depth:1.125"; External Height:1.125"; External Width:1.375"; Frequency Response Max:15kHz; Frequency Response Min:200Hz; Leaded Process Compatible:Yes
A42MX04-1PQ100A Line Matching Transformer; Leaded Process Compatible:Yes; Insertion Loss:0.8dBA; Peak Reflow Compatible (260 C):Yes
A42MX09-1PQ100A TRANSF 900 OHM SEC. 0MA DC TEL
A42MX16-1PQ100A 40MX and 42MX FPGA Families
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A42MX16-1PQ100A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX16-1PQ100B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX16-1PQ100ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX FPGA Families
A42MX16-1PQ100I 功能描述:IC FPGA MX SGL CHIP 24K 100-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27）
A42MX16-1PQ100M 制造商:Microsemi Corporation 功能描述:FPGA 24K GATES 608 CELLS 119MHZ/198MHZ 0.45UM 3.3V/5V 100PQF - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 83 I/O 100PQFP 制造商:Microsemi Corporation 功能描述:IC FPGA MX SGL CHIP 24K 100-PQFP
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