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參數資料
| 型號： | A42MX16-FBG100B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Octal Buffers and Line Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁數： | 84/123頁 |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX16-FBG100B |
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40MX and 42MX FPGA Families
1-78
v6.0
TMS, I/O
Test Mode Select
The TMS pin controls the use of the IEEE 1149.1
Boundary Scan pins (TCK, TDI, TDO). In flexible mode
when the TMS pin is set LOW, the TCK, TDI and TDO pins
are boundary scan pins. Once the boundary scan pins are
in test mode, they will remain in that mode until the
internal boundary scan state machine reaches the "logic
reset" state. At this point, the boundary scan pins will be
released and will function as regular I/O pins. The "logic
reset" state is reached 5 TCK cycles after the TMS pin is
set HIGH. In dedicated test mode, TMS functions as
specified in the IEEE 1149.1 specifications. IEEE JTAG
specification recommends a 10k
pull-up resistor on the
pin. BST pins are only available in A42MX24 and
A42MX36 devices.
V
CC
Input supply voltage for 40MX devices
Supply Voltage
V
CCA
Supply voltage for array in 42MX devices
Supply Voltage
V
CCI
Supply voltage for I/Os in 42MX devices
Supply Voltage
WD, I/O
Wide Decode Output
When a wide decode module is used in a 42MX device
this pin can be used as a dedicated output from the wide
decode module. This direct connection eliminates
additional interconnect delays associated with regular
logic modules. To implement the direct I/O connection,
connect an output buffer of any type to the output of
the wide decode macro and place this output on one of
the reserved WD pins.
相關PDF資料 |
PDF描述 |
|---|---|
| A42MX16-FBG100ES | Octal Buffers and Line Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| A42MX16-FBG100I | Octal Buffers and Line Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| A42MX16-FBG100M | Octal Buffers and Line Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| A42MX16-FCQ100 | Octal Buffers and Line Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| A42MX16-FCQ100A | Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| A42MX16-FBG100ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX FPGA Families |
| A42MX16-FBG100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-FBG100M | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:40MX and 42MX FPGA Families |
| A42MX16-FCQ100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-FCQ100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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